Hello, This series contains improvements to the Qualcomm PCIe Endpoint controller driver. The major improvements are the addition of SM8450 SoC support and debugfs interface for exposing link transition counts. This series has been tested on SM8450 based dev board. NOTE: Since the bindings are ACKed, the whole series could be merged to the PCI tree. Thanks, Mani Changes in v4: * Collected tags for bindings patches * Reworded the subject of patch 2/12 Changes in v3: * Removed the maxItems property from "items" list * Reworded the debugfs patch * Dropped the eDMA patch since that depends on ongoing eDMA series from Sergey * Added two new patches that helps in saving power during idle and low power state Changes in v2: * Fixed the comments on bindings patches * Added Ack from Krzysztof Manivannan Sadhasivam (12): PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure PCI: qcom-ep: Rely on the clocks supplied by devicetree PCI: qcom-ep: Make use of the cached dev pointer PCI: qcom-ep: Disable IRQs during driver remove PCI: qcom-ep: Expose link transition counts via debugfs PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic dt-bindings: PCI: qcom-ep: Make PERST separation optional PCI: qcom-ep: Make PERST separation optional dt-bindings: PCI: qcom-ep: Define clocks per platform dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC PCI: qcom-ep: Add support for SM8450 SoC .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 86 +++++++--- drivers/pci/controller/dwc/pcie-qcom-ep.c | 154 ++++++++++++++---- 2 files changed, 188 insertions(+), 52 deletions(-) -- 2.25.1
