On Fri, 26 Aug 2022 00:12:44 -0700, Eric Biggers wrote:
> From: Eric Biggers <ebiggers@xxxxxxxxxx>
>
> Add the registers and clock for the Inline Crypto Engine (ICE) to the
> device tree node for the UFS host controller on sm8450. This makes
> ufs_qcom support inline encryption when CONFIG_SCSI_UFS_CRYPTO=y.
>
> The address and size of the register range, and the minimum and maximum
> frequency of the ICE core clock, all match the values used downstream.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clock
commit: 276ee34a40c1440544f609b54b23b99ead8f2205
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
