Quoting Krishna Chaitanya Chundru (2022-08-23 20:37:59) > > On 8/9/2022 12:42 AM, Stephen Boyd wrote: > > Quoting Krishna chaitanya chundru (2022-08-03 04:28:53) > >> If the endpoint device state is D0 and irq's are not freed, then > >> kernel try to mask interrupts in system suspend path by writing > >> in to the vector table (for MSIX interrupts) and config space (for MSI's). > >> > >> These transactions are initiated in the pm suspend after pcie clocks got > >> disabled as part of platform driver pm suspend call. Due to it, these > >> transactions are resulting in un-clocked access and eventually to crashes. > > Why are the platform driver pm suspend calls disabling clks that early? > > Can they disable clks in noirq phase, or even later, so that we don't > > have to check if the device is clocking in the irq poking functions? > > It's best to keep irq operations fast, so that irq control is fast given > > that these functions are called from irq flow handlers. > > We are registering the pcie pm suspend ops as noirq ops only. And this > msix and config > > access is coming at the later point of time that is reason we added that > check. > What is accessing msix and config? Can you dump_stack() after noirq ops are called and figure out what is trying to access the bus when it is powered down?
