Re: [PATCH 1/8] dt-bindings: remoteproc: qcom: adsp: Make ADSP pil loader as generic

[Caleb Connolly <caleb.connolly@xxxxxxxxxx>]

Hi,
On 03/08/2022 15:21, Srinivasa Rao Mandadapu wrote:
> Rename sdm845 adsp pil bindings to generic name, for using same binings
> file for subsequent SoCs.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
> ---
>   .../bindings/remoteproc/qcom,lpass-adsp-pil.yaml   | 160 +++++++++++++++++++++
>   .../bindings/remoteproc/qcom,sdm845-adsp-pil.yaml  | 160 ---------------------
>   2 files changed, 160 insertions(+), 160 deletions(-)
>   create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,lpass-adsp-pil.yaml
>   delete mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
This should be a rename, I think passing the -M flag to "git format-patch" 
detects it.
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,lpass-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,lpass-adsp-pil.yaml
> new file mode 100644
> index 0000000..9f11332
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,lpass-adsp-pil.yaml
> @@ -0,0 +1,160 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/qcom,lpass-adsp-pil.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm LPASS ADSP Peripheral Image Loader
> +
> +maintainers:
> +  - Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> +
> +description:
> +  This document defines the binding for a component that loads and boots firmware
> +  on the Qualcomm Technology Inc. ADSP.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sdm845-adsp-pil
> +
> +  reg:
> +    maxItems: 1
> +    description:
> +      The base address and size of the qdsp6ss register
> +
> +  interrupts:
> +    items:
> +      - description: Watchdog interrupt
> +      - description: Fatal interrupt
> +      - description: Ready interrupt
> +      - description: Handover interrupt
> +      - description: Stop acknowledge interrupt
> +
> +  interrupt-names:
> +    items:
> +      - const: wdog
> +      - const: fatal
> +      - const: ready
> +      - const: handover
> +      - const: stop-ack
> +
> +  clocks:
> +    items:
> +      - description: XO clock
> +      - description: SWAY clock
> +      - description: LPASS AHBS AON clock
> +      - description: LPASS AHBM AON clock
> +      - description: QDSP XO clock
> +      - description: Q6SP6SS SLEEP clock
> +      - description: Q6SP6SS CORE clock
> +
> +  clock-names:
> +    items:
> +      - const: xo
> +      - const: sway_cbcr
> +      - const: lpass_ahbs_aon_cbcr
> +      - const: lpass_ahbm_aon_cbcr
> +      - const: qdsp6ss_xo
> +      - const: qdsp6ss_sleep
> +      - const: qdsp6ss_core
> +
> +  power-domains:
> +    items:
> +      - description: CX power domain
> +
> +  resets:
> +    items:
> +      - description: PDC AUDIO SYNC RESET
> +      - description: CC LPASS restart
> +
> +  reset-names:
> +    items:
> +      - const: pdc_sync
> +      - const: cc_lpass
> +
> +  memory-region:
> +    maxItems: 1
> +    description: Reference to the reserved-memory for the Hexagon core
> +
> +  qcom,halt-regs:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description:
> +      Phandle reference to a syscon representing TCSR followed by the
> +      three offsets within syscon for q6, modem and nc halt registers.
> +
> +  qcom,smem-states:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description: States used by the AP to signal the Hexagon core
> +    items:
> +      - description: Stop the modem
> +
> +  qcom,smem-state-names:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    description: The names of the state bits used for SMP2P output
> +    items:
> +      - const: stop
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - interrupt-names
> +  - clocks
> +  - clock-names
> +  - power-domains
> +  - resets
> +  - reset-names
> +  - qcom,halt-regs
> +  - memory-region
> +  - qcom,smem-states
> +  - qcom,smem-state-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/qcom,rpmh.h>
> +    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> +    #include <dt-bindings/clock/qcom,lpass-sdm845.h>
> +    #include <dt-bindings/power/qcom-rpmpd.h>
> +    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> +    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> +    remoteproc@17300000 {
> +        compatible = "qcom,sdm845-adsp-pil";
> +        reg = <0x17300000 0x40c>;
> +
> +        interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
> +                <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> +                <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> +                <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> +                <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> +        interrupt-names = "wdog", "fatal", "ready",
> +                "handover", "stop-ack";
> +
> +        clocks = <&rpmhcc RPMH_CXO_CLK>,
> +                 <&gcc GCC_LPASS_SWAY_CLK>,
> +                 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
> +                 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
> +                 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
> +                 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
> +                 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
> +        clock-names = "xo", "sway_cbcr",
> +                "lpass_ahbs_aon_cbcr",
> +                "lpass_ahbm_aon_cbcr", "qdsp6ss_xo",
> +                "qdsp6ss_sleep", "qdsp6ss_core";
> +
> +        power-domains = <&rpmhpd SDM845_CX>;
> +
> +        resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
> +                 <&aoss_reset AOSS_CC_LPASS_RESTART>;
> +        reset-names = "pdc_sync", "cc_lpass";
> +
> +        qcom,halt-regs = <&tcsr_mutex_regs 0x22000>;
> +
> +        memory-region = <&pil_adsp_mem>;
> +
> +        qcom,smem-states = <&adsp_smp2p_out 0>;
> +        qcom,smem-state-names = "stop";
> +    };
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
> deleted file mode 100644
> index 1535bbb..0000000
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
> +++ /dev/null
> @@ -1,160 +0,0 @@
> -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> -%YAML 1.2
> ----
> -$id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml#
> -$schema: http://devicetree.org/meta-schemas/core.yaml#
> -
> -title: Qualcomm SDM845 ADSP Peripheral Image Loader
> -
> -maintainers:
> -  - Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> -
> -description:
> -  This document defines the binding for a component that loads and boots firmware
> -  on the Qualcomm Technology Inc. ADSP.
> -
> -properties:
> -  compatible:
> -    enum:
> -      - qcom,sdm845-adsp-pil
> -
> -  reg:
> -    maxItems: 1
> -    description:
> -      The base address and size of the qdsp6ss register
> -
> -  interrupts:
> -    items:
> -      - description: Watchdog interrupt
> -      - description: Fatal interrupt
> -      - description: Ready interrupt
> -      - description: Handover interrupt
> -      - description: Stop acknowledge interrupt
> -
> -  interrupt-names:
> -    items:
> -      - const: wdog
> -      - const: fatal
> -      - const: ready
> -      - const: handover
> -      - const: stop-ack
> -
> -  clocks:
> -    items:
> -      - description: XO clock
> -      - description: SWAY clock
> -      - description: LPASS AHBS AON clock
> -      - description: LPASS AHBM AON clock
> -      - description: QDSP XO clock
> -      - description: Q6SP6SS SLEEP clock
> -      - description: Q6SP6SS CORE clock
> -
> -  clock-names:
> -    items:
> -      - const: xo
> -      - const: sway_cbcr
> -      - const: lpass_ahbs_aon_cbcr
> -      - const: lpass_ahbm_aon_cbcr
> -      - const: qdsp6ss_xo
> -      - const: qdsp6ss_sleep
> -      - const: qdsp6ss_core
> -
> -  power-domains:
> -    items:
> -      - description: CX power domain
> -
> -  resets:
> -    items:
> -      - description: PDC AUDIO SYNC RESET
> -      - description: CC LPASS restart
> -
> -  reset-names:
> -    items:
> -      - const: pdc_sync
> -      - const: cc_lpass
> -
> -  memory-region:
> -    maxItems: 1
> -    description: Reference to the reserved-memory for the Hexagon core
> -
> -  qcom,halt-regs:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
> -    description:
> -      Phandle reference to a syscon representing TCSR followed by the
> -      three offsets within syscon for q6, modem and nc halt registers.
> -
> -  qcom,smem-states:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
> -    description: States used by the AP to signal the Hexagon core
> -    items:
> -      - description: Stop the modem
> -
> -  qcom,smem-state-names:
> -    $ref: /schemas/types.yaml#/definitions/string
> -    description: The names of the state bits used for SMP2P output
> -    items:
> -      - const: stop
> -
> -required:
> -  - compatible
> -  - reg
> -  - interrupts
> -  - interrupt-names
> -  - clocks
> -  - clock-names
> -  - power-domains
> -  - resets
> -  - reset-names
> -  - qcom,halt-regs
> -  - memory-region
> -  - qcom,smem-states
> -  - qcom,smem-state-names
> -
> -additionalProperties: false
> -
> -examples:
> -  - |
> -    #include <dt-bindings/interrupt-controller/arm-gic.h>
> -    #include <dt-bindings/clock/qcom,rpmh.h>
> -    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> -    #include <dt-bindings/clock/qcom,lpass-sdm845.h>
> -    #include <dt-bindings/power/qcom-rpmpd.h>
> -    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> -    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> -    remoteproc@17300000 {
> -        compatible = "qcom,sdm845-adsp-pil";
> -        reg = <0x17300000 0x40c>;
> -
> -        interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
> -                <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> -                <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> -                <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> -                <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> -        interrupt-names = "wdog", "fatal", "ready",
> -                "handover", "stop-ack";
> -
> -        clocks = <&rpmhcc RPMH_CXO_CLK>,
> -                 <&gcc GCC_LPASS_SWAY_CLK>,
> -                 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
> -                 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
> -                 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
> -                 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
> -                 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
> -        clock-names = "xo", "sway_cbcr",
> -                "lpass_ahbs_aon_cbcr",
> -                "lpass_ahbm_aon_cbcr", "qdsp6ss_xo",
> -                "qdsp6ss_sleep", "qdsp6ss_core";
> -
> -        power-domains = <&rpmhpd SDM845_CX>;
> -
> -        resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
> -                 <&aoss_reset AOSS_CC_LPASS_RESTART>;
> -        reset-names = "pdc_sync", "cc_lpass";
> -
> -        qcom,halt-regs = <&tcsr_mutex_regs 0x22000>;
> -
> -        memory-region = <&pil_adsp_mem>;
> -
> -        qcom,smem-states = <&adsp_smp2p_out 0>;
> -        qcom,smem-state-names = "stop";
> -    };
> --
> 2.7.4

--
Kind Regards,
Caleb (they/he)