Hi Mani,
On 7/12/2022 11:56 PM, Manivannan Sadhasivam wrote:
On Tue, Jul 12, 2022 at 07:41:14PM +0300, Dmitry Baryshkov wrote:
On Tue, 12 Jul 2022 at 19:24, Johan Hovold <johan@xxxxxxxxxx> wrote:
On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
Wrong values have been introduced for interrupts property. Fix those
ones, and correct the mapping of context banks to irq number.
And you ignored my comment about sorting the IRQs...
Isn't the order significant here? Either way, that would be a separate
change that shouldn't be merged with the fix.
I'd tend to agree here. Let's get the fix in first and sort the IRQs
in a separate commit. The order of them is strange indeed.
As per "arm,smmu.yaml" devicetree documentation, context interrupts are specified in order of their indexing by the SMMU
and not the IRQ numbers, quoting relevant part below.
"Interrupt list, with the first #global-interrupts entries corresponding to the global interrupts
and any following entries corresponding to context interrupts, specified in order of their indexing by the SMMU."
And the current order in DT without sorting by IRQ number matches with the SMMU IP interrupt document,
For example, in the current DT order, you see 409 and then 418 instead of 410. Here 409 is app_tcu_cxt_irpt_vec[73],
418 is app_tcu_cxt_irpt_vec[74] and 410 is app_tcu_cxt_irpt_vec[90] and hence the ordering of 409, 418 .... 410.
Also the reverse ordering at the end from 913 to 891 is also as per this indexing.
So the current ordering is proper and do not require sorting.
As for the missing IRQs and duplicate ones, I will reply on the patch, looks like there are some other misconfigurations as well.
Thanks,
Sai
