On Wed, Jul 13, 2022 at 08:43:05PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jul 13, 2022 at 04:55:12PM +0200, Johan Hovold wrote:
> > On Wed, Jul 13, 2022 at 08:04:29PM +0530, Manivannan Sadhasivam wrote:
> > > PPI interrupt should be 7 for the PMU.
> > >
> > > Cc: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> > > Reported-by: Steve Capper <Steve.Capper@xxxxxxx>
> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > > ---
> > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > index 268ab423577a..2d7823cb783c 100644
> > > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > @@ -477,7 +477,7 @@ memory@80000000 {
> > >
> > > pmu {
> > > compatible = "arm,armv8-pmuv3";
> > > - interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> > > + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > >
> > > psci {
> >
> > The interrupt number matches the vendor devicetree I have access to, but
> > the vendor source also has IRQ_TYPE_LEVEL_LOW instead of
> > IRQ_TYPE_LEVEL_HIGH here.
+1 to what I see as well, fwiw. Totally missed that when reviewing
earlier.
> >
> > Is that another copy-paste error, perhaps?
> >
>
> I don't have access to the documentation of this SoC now but since Steve
> tried with IRQ_TYPE_LEVEL_HIGH and it worked for him, I think it is best
> to leave it as it is.
>
> Thanks,
> Mani
>
> > Johan
>
