On 05/07/2022 15:39, Christian Marangi wrote:
> Add gsbi6 missing definition for ipq8064.
>
> Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> Tested-by: Jonathan McDowell <noodles@xxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-ipq8064.dtsi | 40 +++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index f06a17bd915a..1b4b72723ead 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -665,6 +665,46 @@ spi@1a280000 {
> };
> };
>
> + gsbi6: gsbi@16500000 {
> + status = "disabled";
status goes to the end of properties.
> + compatible = "qcom,gsbi-v1.0.0";
Compatible is first.
> + cell-index = <6>;
> + reg = <0x16500000 0x100>;
reg is second.
> + clocks = <&gcc GSBI6_H_CLK>;
> + clock-names = "iface";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + syscon-tcsr = <&tcsr>;
> +
> + gsbi6_i2c: i2c@16580000 {
> + compatible = "qcom,i2c-qup-v1.1.1";
> + reg = <0x16580000 0x1000>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
Ditto.
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + gsbi6_spi: spi@16580000 {
> + compatible = "qcom,spi-qup-v1.1.1";
> + reg = <0x16580000 0x1000>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
Ditto
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> gsbi7: gsbi@16600000 {
> status = "disabled";
> compatible = "qcom,gsbi-v1.0.0";
Best regards,
Krzysztof
