Add an example node based on a cleaned up version of sm8250.dtsi.
Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
---
.../bindings/phy/qcom,qmp-pcie-phy.yaml | 41 +++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
index 5a1ebf874559..3fc08af41144 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
@@ -262,3 +262,44 @@ allOf:
properties:
reg:
minItems: 4
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
+ phy-wrapper@1c0e000 {
+ compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";
+ reg = <0x01c0e000 0x1c0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x01c0e000 0x1000>;
+
+ clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
+ <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
+ <&gcc GCC_PCIE_WIGIG_CLKREF_EN>,
+ <&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
+
+ clock-names = "aux", "cfg_ahb", "ref", "refgen";
+
+ resets = <&gcc GCC_PCIE_1_PHY_BCR>;
+ reset-names = "phy";
+
+ vdda-phy-supply = <&vreg_l10c_0p88>;
+ vdda-pll-supply = <&vreg_l6b_1p2>;
+
+ phy@200 {
+ reg = <0x200 0x170>,
+ <0x400 0x200>,
+ <0xa00 0x1f0>,
+ <0x600 0x170>,
+ <0x800 0x200>,
+ <0xe00 0xf4>;
+
+ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
+ clock-names = "pipe0";
+
+ #clock-cells = <0>;
+ clock-output-names = "pcie_1_pipe_clk";
+
+ #phy-cells = <0>;
+ };
+ };
--
2.35.1
