Only UFS PHY nodes in mainline have a vddp-ref-clk supply. Drop it from
the PCIe PHY binding.
Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
---
Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml | 4 ----
1 file changed, 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
index 557cccc8f4dd..ff1577f68a00 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
@@ -66,10 +66,6 @@ properties:
description:
Phandle to 1.8V regulator supply to PHY refclk pll block.
- vddp-ref-clk-supply:
- description:
- Phandle to a regulator supply to any specific refclk pll block.
-
patternProperties:
"^phy@[0-9a-f]+$":
type: object
--
2.35.1
