On 29/06/2022 13:22, Rajendra Nayak wrote:
>
>
> On 6/29/2022 1:22 PM, Krzysztof Kozlowski wrote:
>> Add device node for CPU-memory BWMON device (bandwidth monitoring) on
>> SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level
>> Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth
>> votes from cpufreq (CPU nodes) thus achieve high memory throughput even
>> with lower CPU frequencies.
>>
>> Co-developed-by: Thara Gopinath <thara.gopinath@xxxxxxxxx>
>> Signed-off-by: Thara Gopinath <thara.gopinath@xxxxxxxxx>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>> ---
>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++
>> 1 file changed, 38 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> index 83e8b63f0910..e0f088996390 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> @@ -2026,6 +2026,44 @@ llcc: system-cache-controller@1100000 {
>> interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>> };
>>
>> + pmu@1436400 {
>> + compatible = "qcom,sdm845-cpu-bwmon", "qcom,msm8998-cpu-bwmon";
>> + reg = <0 0x01436400 0 0x600>;
>> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
>> + interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
>> +
>> + operating-points-v2 = <&cpu_bwmon_opp_table>;
>> +
>> + cpu_bwmon_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + /*
>> + * The interconnect paths bandwidths taken from
>> + * cpu4_opp_table bandwidth.
>> + * They also match different tables from
>> + * msm-4.9 downstream kernel:
>> + * - the OSM L3 from bandwidth table of
>> + * qcom,cpu4-l3lat-mon (qcom,core-dev-table);
>> + * bus width: 16 bytes;
>> + */
>
> Maybe the comment needs an update?
Yes, a bit.
Best regards,
Krzysztof
