On Tue, 31 May 2022 15:47:35 +0300, Dmitry Baryshkov wrote:
> It was noticed that on sdm845 after an MDSS suspend/resume cycle the
> driver can not read HW_REV registers properly (they will return 0
> instead). Chaning the "iface" clock from <&gcc GCC_DISP_AHB_CLK> to
> <&dispcc DISP_CC_MDSS_AHB_CLK> fixes the issue.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node
commit: 3ba500dee327e0261e728edec8a4f2f563d2760c
Best regards,
--
Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
