On Fri 24 Jun 06:59 CDT 2022, Vladimir Zapolskiy wrote:
> Add description of QCOM SM8450 camera clock controller.
>
> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx>
> ---
> Changes from v7 to v8:
> * rebased on top of v5.19-rc2,
> * minor improvement to the commit message.
>
> Changes from v6 to v7:
> * rebased on top of v5.19-rc1.
>
> Changes from v5 to v6:
> * rebased on top of linux-next.
>
> Changes from v3 to v5:
> * none.
>
> Changes from v2 to v3:
> * account a renamed header file.
>
> Changes from v1 to v2:
> * disabled camcc device tree node by default.
>
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 7d08fad76371..fad813a21df5 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-sm8450.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/clock/qcom,sm8450-camcc.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> @@ -2288,6 +2289,25 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
> };
> };
>
> + camcc: clock-controller@ade0000 {
> + compatible = "qcom,sm8450-camcc";
> + reg = <0 0x0ade0000 0 0x20000>;
> + status = "disabled";
Please put the status last.
Regards,
Bjorn
> + clocks = <&gcc GCC_CAMERA_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>,
> + <&rpmhcc RPMH_CXO_CLK_A>,
> + <&sleep_clk>;
> + clock-names = "iface",
> + "bi_tcxo",
> + "bi_tcxo_ao",
> + "sleep_clk";
> + power-domains = <&rpmhpd SM8450_MMCX>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sm8450-pdc", "qcom,pdc";
> reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> --
> 2.33.0
>
