On Thu, Jun 23, 2022 at 05:37:12PM -0700, Stephen Boyd wrote:
> Quoting Stephen Boyd (2022-06-23 17:27:18)
> > Quoting Dmitry Baryshkov (2022-06-20 14:51:50)
> > > Use parent_data for the last remaining entry (pll4). This clock is
> > > provided by the lcc device.
> > >
> > > Fixes: cb02866f9a74 ("clk: qcom: gcc-ipq806x: convert parent_names to parent_data")
> > > Cc: Ansuel Smith <ansuelsmth@xxxxxxxxx>
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> > > ---
> > > drivers/clk/qcom/gcc-ipq806x.c | 4 +++-
> > > 1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
> > > index 718de17a1e60..6447f3e81b55 100644
> > > --- a/drivers/clk/qcom/gcc-ipq806x.c
> > > +++ b/drivers/clk/qcom/gcc-ipq806x.c
> > > @@ -79,7 +79,9 @@ static struct clk_regmap pll4_vote = {
> > > .enable_mask = BIT(4),
> > > .hw.init = &(struct clk_init_data){
> > > .name = "pll4_vote",
> > > - .parent_names = (const char *[]){ "pll4" },
> > > + .parent_data = &(const struct clk_parent_data){
> > > + .fw_name = "pll4", .name = "pll4",
> >
> > Is there a DT binding update?
>
> Also I'd appreciate clk patches be sent to my kernel.org email instead
> of chromium to help my filters.
Sorry for the OT but as you mention... there are many series for ipq806x
all reviewed. Wonder if they can be picked or should I RESEND them?
Some of them are blocking me from sending other fixes as the current
dtsi have wrong definition that would cause kernel panic (if things are
correctly implemented on the driver side)
--
Ansuel
