PCIe pipe clk (and some other clocks) must be parked to the "safe"
source (bi_tcxo) when corresponding GDSC is turned off and on again.
Currently this is handcoded in the PCIe driver by reparenting the
gcc_pipe_N_clk_src clock.
Instead of doing it manually, follow the approach used by
clk_rcg2_shared_ops and implement this parking in the enable() and
disable() clock operations for respective pipe clocks.
Changes since v6:
- Switched the ops to use GENMASK/FIELD_GET/FIELD_PUT (Stephen),
- As all pipe/symbol clock source clocks have the same register (and
parents) layout, hardcode all the values. If the need arises, this
can be changed later (Stephen),
- Fixed commit messages and comments (suggested by Johan),
- Added revert for the clk_regmap_mux_safe that have been already
picked up by Bjorn.
Changes since v5:
- Rename the clock to clk-regmap-phy-mux and the enable/disable values
to phy_src_val and ref_src_val respectively (as recommended by
Johan).
Changes since v4:
- Renamed the clock to clk-regmap-pipe-src,
- Added mention of PCIe2 PHY to the commit message,
- Expanded commit messages to mention additional pipe clock details.
Changes since v3:
- Replaced the clock multiplexer implementation with branch-like clock.
Changes since v2:
- Added is_enabled() callback
- Added default parent to the pipe clock configuration
Changes since v1:
- Rebased on top of [1].
- Removed erroneous Fixes tag from the patch 4.
Changes since RFC:
- Rework clk-regmap-mux fields. Specify safe parent as P_* value rather
than specifying the register value directly
- Expand commit message to the first patch to specially mention that
it is required only on newer generations of Qualcomm chipsets.
Dmitry Baryshkov (6):
PCI: qcom: Remove unnecessary pipe_clk handling
clk: qcom: regmap: add PHY clock source implementation
clk: qcom: gcc-sm8450: use new clk_regmap_phy_mux_ops for PCIe pipe
clocks
clk: qcom: gcc-sc7280: use new clk_regmap_phy_mux_ops for PCIe pipe
clocks
Revert "clk: qcom: regmap-mux: add pipe clk implementation"
PCI: qcom: Drop manual pipe_clk_src handling
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-regmap-mux.c | 78 -------------------------
drivers/clk/qcom/clk-regmap-mux.h | 3 -
drivers/clk/qcom/clk-regmap-phy-mux.c | 53 +++++++++++++++++
drivers/clk/qcom/clk-regmap.h | 17 ++++++
drivers/clk/qcom/gcc-sc7280.c | 70 +++++++---------------
drivers/clk/qcom/gcc-sm8450.c | 72 +++++++----------------
drivers/pci/controller/dwc/pcie-qcom.c | 81 +-------------------------
8 files changed, 118 insertions(+), 257 deletions(-)
create mode 100644 drivers/clk/qcom/clk-regmap-phy-mux.c
--
2.35.1
