On recent Qualcomm platforms the QMP PIPE clocks feed into a set of
muxes which must be parked to the "safe" source (bi_tcxo) when
corresponding GDSC is turned off and on again. Currently this is
handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src
clock. However the same code sequence should be applied in the
pcie-qcom endpoint, USB3 and UFS drivers.
Rather than copying this sequence over and over again, follow the
example of clk_rcg2_shared_ops and implement this parking in the
enable() and disable() clock operations. Suppliement the regmap-mux with
the new regmap-pipe implementation, which hides multiplexer behind
simple branch-like clock. This is possible since each of this
multiplexers has just two clock sources: working (pipe) and safe
(bi_tcxo) clock sources. If the clock is running off the external pipe
source, report it as enable and report it as disabled otherwise.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-regmap-pipe.c | 62 ++++++++++++++++++++++++++++++
drivers/clk/qcom/clk-regmap-pipe.h | 24 ++++++++++++
3 files changed, 87 insertions(+)
create mode 100644 drivers/clk/qcom/clk-regmap-pipe.c
create mode 100644 drivers/clk/qcom/clk-regmap-pipe.h
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 671cf5821af1..882c8ecc2e93 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -11,6 +11,7 @@ clk-qcom-y += clk-branch.o
clk-qcom-y += clk-regmap-divider.o
clk-qcom-y += clk-regmap-mux.o
clk-qcom-y += clk-regmap-mux-div.o
+clk-qcom-y += clk-regmap-pipe.o
clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o
clk-qcom-y += clk-hfpll.o
clk-qcom-y += reset.o
diff --git a/drivers/clk/qcom/clk-regmap-pipe.c b/drivers/clk/qcom/clk-regmap-pipe.c
new file mode 100644
index 000000000000..9a7c27cc644b
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-pipe.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022, Linaro Ltd.
+ */
+
+#include <linux/kernel.h>
+#include <linux/bitops.h>
+#include <linux/regmap.h>
+#include <linux/export.h>
+
+#include "clk-regmap-pipe.h"
+
+static inline struct clk_regmap_pipe *to_clk_regmap_pipe(struct clk_hw *hw)
+{
+ return container_of(to_clk_regmap(hw), struct clk_regmap_pipe, clkr);
+}
+
+static int pipe_is_enabled(struct clk_hw *hw)
+{
+ struct clk_regmap_pipe *pipe = to_clk_regmap_pipe(hw);
+ struct clk_regmap *clkr = to_clk_regmap(hw);
+ unsigned int mask = GENMASK(pipe->width + pipe->shift - 1, pipe->shift);
+ unsigned int val;
+
+ regmap_read(clkr->regmap, pipe->reg, &val);
+ val = (val & mask) >> pipe->shift;
+
+ WARN_ON(unlikely(val != pipe->enable_val && val != pipe->disable_val));
+
+ return val == pipe->enable_val;
+}
+
+static int pipe_enable(struct clk_hw *hw)
+{
+ struct clk_regmap_pipe *pipe = to_clk_regmap_pipe(hw);
+ struct clk_regmap *clkr = to_clk_regmap(hw);
+ unsigned int mask = GENMASK(pipe->width + pipe->shift - 1, pipe->shift);
+ unsigned int val;
+
+ val = pipe->enable_val << pipe->shift;
+
+ return regmap_update_bits(clkr->regmap, pipe->reg, mask, val);
+}
+
+static void pipe_disable(struct clk_hw *hw)
+{
+ struct clk_regmap_pipe *pipe = to_clk_regmap_pipe(hw);
+ struct clk_regmap *clkr = to_clk_regmap(hw);
+ unsigned int mask = GENMASK(pipe->width + pipe->shift - 1, pipe->shift);
+ unsigned int val;
+
+ val = pipe->disable_val << pipe->shift;
+
+ regmap_update_bits(clkr->regmap, pipe->reg, mask, val);
+}
+
+const struct clk_ops clk_regmap_pipe_ops = {
+ .enable = pipe_enable,
+ .disable = pipe_disable,
+ .is_enabled = pipe_is_enabled,
+};
+EXPORT_SYMBOL_GPL(clk_regmap_pipe_ops);
diff --git a/drivers/clk/qcom/clk-regmap-pipe.h b/drivers/clk/qcom/clk-regmap-pipe.h
new file mode 100644
index 000000000000..cfaa792a029b
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-pipe.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2022, Linaru Ltd.
+ * Author: Dmitry Baryshkov
+ */
+
+#ifndef __QCOM_CLK_REGMAP_PIPE_H__
+#define __QCOM_CLK_REGMAP_PIPE_H__
+
+#include <linux/clk-provider.h>
+#include "clk-regmap.h"
+
+struct clk_regmap_pipe {
+ u32 reg;
+ u32 shift;
+ u32 width;
+ u32 enable_val;
+ u32 disable_val;
+ struct clk_regmap clkr;
+};
+
+extern const struct clk_ops clk_regmap_pipe_ops;
+
+#endif
--
2.35.1
