On Tue, 14 Dec 2021 15:43:19 +0530, Manivannan Sadhasivam wrote:
> The DWC controller used in the Qcom Platforms are capable of addressing the
> MSIs generated from 8 different endpoints each with 32 vectors (256 in
> total). Currently the driver is using the default value of addressing the
> MSIs from 1 endpoint only. Extend it by passing the MAX_MSI_IRQS to the
> num_vectors field of pcie_port structure.
>
>
> [...]
Applied to pci/qcom, thanks!
[1/1] PCI: qcom: Add support for handling MSIs from 8 endpoints
https://git.kernel.org/lpieralisi/pci/c/20f1bfb8dd
Thanks,
Lorenzo
