On Thu, Aug 14, 2014 at 04:24:10PM +0200, Daniel Lezcano wrote:
On 08/13/2014 04:16 PM, Lina Iyer wrote:
On Wed, Aug 13, 2014 at 01:18:01PM +0200, Daniel Lezcano wrote:
On 08/12/2014 09:43 PM, Lina Iyer wrote:
+static bool msm_pm_retention(bool from_idle)
+{
+ int ret = 0;
+
+ ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_RETENTION, false);
+ WARN_ON(ret);
+
+ msm_arch_idle();
+
+ ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_CLOCK_GATING, false);
+ WARN_ON(ret);
Why do you need to set the clock gating mode each time you exit the
retention mode ?
So if the SPM did not reset to clockgating, we would not do retention
when we intended to do clockgating. Btw, we dont set clockgating
everytime we do clockgating, helps reduce the latency in doing WFI.
Can you elaborate ? Or may be just describe what is the doing the
function because I don't get the connection between your explanation
and the code.
Retention still has an higher latency than clock gating. Retention gets
triggered with the core executes wfi() instruction. The entry into a
steady state retention mode is higher than just gating clocks, which may
be bad for power, if we do not stay in the low power modes for a minimum
of the residency period.
If the current idle state was retention and SPM was configured to do
retention and we came out the retention state and the next idle, we
decided to do clockgating we should configure the SPM to do clock
gating. Since we want to speed up clockgating as its one of the state
most commonly entered, we set the configuration of SPM as soon as we
come out any low power mode back to WFI.
+ return true;
+}
+
+static int msm_pm_collapse(unsigned long from_idle)
+{
+ enum msm_pm_l2_scm_flag flag = MSM_SCM_L2_ON;
+
+ /**
+ * Single core processors need to have L2
+ * flushed when powering down the core.
+ * Notify SCM to flush secure L2 lines.
+ */
+ if (num_possible_cpus() == 1)
+ flag = MSM_SCM_L2_OFF;
I am wondering if this shouldn't be handle by a mcpm driver.
Cc nico.
Well, possibly, sorry, not sure what features of the mcpm driver you
think I need here?
Please correct me if I am wrong. IIUC, this function is checking the
number of the cpus of the cluster in order to flush the L2 cache
because the SCM will power down the cluster if it is the last one,
right ?
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