On Thu, Mar 24, 2022 at 06:10:35PM -0700, Stephen Boyd wrote:
> Quoting Ansuel Smith (2022-03-21 16:15:33)
> > PXO_SRC is currently defined in the gcc include and referenced in the
> > ipq8064 DTSI. Correctly provide a clk after gcc probe to fix kernel
> > panic if a driver starts to actually use it.
> >
> > Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx>
> > ---
>
> What is this patch about? clk providers shouldn't be calling clk_get().
>
If pxo is passed as a clock in dts and defined as a fixed clock, what
should be used?
> > drivers/clk/qcom/gcc-ipq806x.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
> > index 27f6d7626abb..7271d3afdc89 100644
> > --- a/drivers/clk/qcom/gcc-ipq806x.c
> > +++ b/drivers/clk/qcom/gcc-ipq806x.c
> > @@ -26,6 +26,8 @@
> > #include "clk-hfpll.h"
> > #include "reset.h"
> >
> > +static struct clk_regmap pxo = { };
> > +
> > static struct clk_pll pll0 = {
> > .l_reg = 0x30c4,
> > .m_reg = 0x30c8,
> > @@ -2754,6 +2756,7 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = {
> > };
> >
> > static struct clk_regmap *gcc_ipq806x_clks[] = {
> > + [PXO_SRC] = NULL,
> > [PLL0] = &pll0.clkr,
> > [PLL0_VOTE] = &pll0_vote,
> > [PLL3] = &pll3.clkr,
> > @@ -3083,6 +3086,10 @@ static int gcc_ipq806x_probe(struct platform_device *pdev)
> > if (ret)
> > return ret;
> >
> > + clk = clk_get(dev, "pxo");
> > + pxo.hw = *__clk_get_hw(clk);
> > + gcc_ipq806x_clks[PXO_SRC] = &pxo;
> > +
> > regmap = dev_get_regmap(dev, NULL);
> > if (!regmap)
> > return -ENODEV;
> > --
> > 2.34.1
> >
--
Ansuel
