On Fri, Feb 11, 2022 at 5:06 PM Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> wrote: > > On Mon, Feb 07, 2022 at 04:51:23PM +0200, Baruch Siach wrote: > > This series adds support for the single PCIe lane on IPQ6018 SoCs. The code is > > ported from downstream Codeaurora v5.4 kernel. The main difference from > > downstream code is the split of PCIe registers configuration from .init to > > .post_init, since it requires phy_power_on(). > > > > Tested on IPQ6010 based hardware. > > > > Changes in v6: > > > > * Drop DT patch applied to the qcom tree > > > > * Normalize driver changes subject line > > > > * Add a preparatory patch to rename PCIE_CAP_LINK1_VAL to PCIE_CAP_SLOT_VAL, > > and define it using PCI_EXP_SLTCAP_* macros > > > > * Drop a vague comment about ASPM configuration > > > > * Add a comment about the source of delay periods > > > > Changes in v5: > > > > * Remove comments from qcom_pcie_init_2_9_0() (Bjorn Andersson) > > > > Changes in v4: > > > > * Drop applied DT bits > > > > * Add max-link-speed that was missing from the applied v2 patch > > > > * Rebase the driver on v5.16-rc3 > > > > Changes in v3: > > > > * Drop applied patches > > > > * Rely on generic code for speed setup > > > > * Drop unused macros > > > > * Formatting fixes > > > > Changes in v2: > > > > * Add patch moving GEN3_RELATED macros to a common header > > > > * Drop ATU configuration from pcie-qcom > > > > * Remove local definition of common registers > > > > * Use bulk clk and reset APIs > > > > * Remove msi-parent from device-tree > > > > Baruch Siach (2): > > PCI: dwc: tegra: move GEN3_RELATED DBI register to common header > > PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_* > > > > Selvam Sathappan Periakaruppan (1): > > PCI: qcom: Add IPQ60xx support > > > > drivers/pci/controller/dwc/pcie-designware.h | 7 + > > drivers/pci/controller/dwc/pcie-qcom.c | 155 ++++++++++++++++++- > > drivers/pci/controller/dwc/pcie-tegra194.c | 6 - > > 3 files changed, 160 insertions(+), 8 deletions(-) > > Bjorn, Andy, > > Can you ACK please if this series is ready to be merged ? Hi, This would also help the IPQ8074 which has the same controller for the Gen3 port. I have been using this for OpenWrt for a while and it works. Regards, Robert > > Thanks, > Lorenzo -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 10000 Zagreb, Croatia Email: robert.marko@xxxxxxxxxx Web: www.sartura.hr
