On Aug 7, 2014, at 11:05 PM, Lina Iyer <lina.iyer@xxxxxxxxxx> wrote:
> Qualcomm chipsets use an separate h/w block to control the logic around
> the processor cores (cpu and L2). The SPM h/w block regulates power to
> the cores and controls the power when the core enter low power modes.
>
> Each core has its own instance of SPM. The SPM has the following key
> functions
> - Configure the h/w dependencies when entering low power modes
> - Wait for interrupt and wake up on interrupt
> - Ensure the dependencies are ready before bringing the core out
> of sleep
> - Regulating voltage to the core, interfacing with the PMIC.
> - Optimize power based on runtime recommendations.
>
> The driver identifies and configures the SPMs, by reading the nodes and
> the register values from the devicetree. The SPMs need to be configured
> to allow the processor to be idled in a low power state.
>
> Signed-off-by: Praveen Chidamabram <pchidamb@xxxxxxxxxxxxxx>
> Signed-off-by: Murali Nalajala <mnalajal@xxxxxxxxxxxxxx>
> Signed-off-by: Lina Iyer <lina.iyer@xxxxxxxxxx>
> ---
> .../devicetree/bindings/arm/msm/spm-v2.txt | 104 +++
> drivers/soc/qcom/Makefile | 2 +
> drivers/soc/qcom/spm.c | 559 ++++++++++++++++
> drivers/soc/qcom/spm_devices.c | 709 +++++++++++++++++++++
> drivers/soc/qcom/spm_driver.h | 118 ++++
> include/soc/qcom/spm.h | 106 +++
> 6 files changed, 1598 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/msm/spm-v2.txt
> create mode 100644 drivers/soc/qcom/spm.c
> create mode 100644 drivers/soc/qcom/spm_devices.c
> create mode 100644 drivers/soc/qcom/spm_driver.h
> create mode 100644 include/soc/qcom/spm.h
>
> diff --git a/Documentation/devicetree/bindings/arm/msm/spm-v2.txt b/Documentation/devicetree/bindings/arm/msm/spm-v2.txt
> new file mode 100644
> index 0000000..ea0fc7a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/msm/spm-v2.txt
> @@ -0,0 +1,104 @@
> +* MSM Subsystem Power Manager (spm-v2)
> +
> +S4 generation of MSMs have SPM hardware blocks to control the Application
> +Processor Sub-System power. These SPM blocks run individual state machine
> +to determine what the core (L2 or Krait/Scorpion) would do when the WFI
> +instruction is executed by the core. The SAW hardware block handles SPM and
> +AVS functionality for the cores.
> +
> +The devicetree representation of the SPM block should be:
> +
> +Required properties
> +
> +- compatible: "qcom,spm-v2"
> +- reg: The physical address and the size of the SPM's memory mapped registers
> +- qcom,cpu: phandle for the CPU that the SPM block is attached to. On targets
> + that dont support CPU phandles the driver would support qcom,core-id.
> + This field is required on only for SPMs that control the CPU.
> +- qcom, core-id: This property will be deprecated once all targets start
> + supporting CPU phandles. This field will be used to identify SPMs
> + that control the CPU.
> + {0..n} for cores {0..n}
Why aren’t we just using cpu phandles for upstream?
> +- qcom,saw2-ver-reg: The location of the version register
I
> +- qcom,saw2-cfg: SAW2 configuration register
What does this even mean, why is this not part of the reg property?
> +- qcom,saw2-avs-ctl: The AVS control register
What does this even mean, why is this not part of the reg property?
> +- qcom,saw2-avs-hysterisis: The AVS hysterisis register to delay the AVS
> + controller requests
Why do we need this?
> +- qcom,saw2-spm-dly: Provides the values for the SPM delay command in the SPM
> + sequence
how many values?
> +- qcom,saw2-spm-ctl: The SPM control register
What does this mean? Is it the offset of the register, and if so from what base? Also, why does this vary, this should possibly be handled by different compatible values.
> +- qcom,vctl-timeout-us: The timeout value in us to wait for voltage to change
us -> microseconds
> + after sending the voltage command to the PMIC
Have we really ever set this to any value other than 50 usec?
> +- qcom,name: The name with which a SPM device is identified by the power
> +management code.
what does this even mean?
> +
> +Optional properties
> +
> +- qcom,saw2-avs-limit: The AVS limit register
same comments above (as qcom,saw2-spm-ctl)
> +- qcom,saw2-avs-dly: The AVS delay register is used to specify the delay values
> + between AVS controller requests
is this a delay value, list of values, a register offset? not clear.
> +- qcom,saw2-pmic-data0..7: Specify the pmic data value and the associated FTS
> + index to send the PMIC data to
what is FTS?
> +- qcom,vctl-port: The PVC (PMIC Virtual Channel) port used for changing
> + voltage
> +- qcom,phase-port: The PVC port used for changing the number of phases
> +- qcom,pfm-port: The PVC port used for enabling PWM/PFM modes
> +- qcom,saw2-spm-cmd-wfi: The WFI command sequence
> +- qcom,saw2-spm-cmd-ret: The Retention command sequence
> +- qcom,saw2-spm-cmd-spc: The Standalone PC command sequence
> +- qcom,saw2-spm-cmd-pc-no-rpm: The Power Collapse command sequence where APPS
> + proc won't inform the RPM.
> +- qcom,saw2-spm-cmd-pc: The Power Collapse command sequence
> +- qcom,saw2-spm-cmd-gdhs: L2 GDHS command sequence
GDHS?
> +- qcom,cpu-vctl-mask: Mask of cpus, whose voltage the spm device can control.
> + Depricated: Replaced with cpu-vctl-list when cpu phandles are available.
if deprecated, remove it.
> +- qcom,cpu-vctl-list: List of cpu node phandles, whose voltage the spm device
> + can control.
> +
> +Example 1:
> + qcom,spm@f9089000 {
> + compatible = "qcom,spm-v2";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0xf9089000 0x1000>;
> + qcom,core-id = <0>;
> + qcom,saw2-ver-reg = <0xfd0>;
> + qcom,saw2-cfg = <0x1b>;
> + qcom,saw2-avs-ctl = <0>;
> + qcom,saw2-avs-hysteresis = <0>;
> + qcom,saw2-avs-limit = <0>;
> + qcom,saw2-avs-dly= <0>;
> + qcom,saw2-spm-dly= <0x20000400>;
> + qcom,saw2-spm-ctl = <0x1>;
> + qcom,cpu-vctl-mask = <0xf>;
> + qcom,saw2-spm-cmd-wfi = [03 0b 0f];
> + qcom,saw2-spm-cmd-spc = [00 20 50 80 60 70 10 92
> + a0 b0 03 68 70 3b 92 a0 b0
> + 82 2b 50 10 30 02 22 30 0f];
> + qcom,saw2-spm-cmd-pc = [00 20 10 92 a0 b0 07 3b 92
> + a0 b0 82 10 30 02 22 30 0f];
> + };
> +
> +Example 2:
> + qcom,spm@f9089000 {
> + compatible = "qcom,spm-v2";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0xf9089000 0x1000>;
> + qcom,core-id = <0>;
> + qcom,saw2-ver-reg = <0xfd0>;
> + qcom,saw2-cfg = <0x1b>;
> + qcom,saw2-avs-ctl = <0>;
> + qcom,saw2-avs-hysteresis = <0>;
> + qcom,saw2-avs-limit = <0>;
> + qcom,saw2-avs-dly= <0>;
> + qcom,saw2-spm-dly= <0x20000400>;
> + qcom,saw2-spm-ctl = <0x1>;
> + qcom,cpu-vctl-list = <&CPU0 &CPU1 &CPU2 &CPU3>;
> + qcom,saw2-spm-cmd-wfi = [03 0b 0f];
> + qcom,saw2-spm-cmd-spc = [00 20 50 80 60 70 10 92
> + a0 b0 03 68 70 3b 92 a0 b0
> + 82 2b 50 10 30 02 22 30 0f];
> + qcom,saw2-spm-cmd-pc = [00 20 10 92 a0 b0 07 3b 92
> + a0 b0 82 10 30 02 22 30 0f];
> + };
- k
--
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