Hello, Changes from v3: - Removed the redundant patches after addressing Mani's comments. - Rebased on top of v5.17-rc5. Changes from v2: - Addressed Stephen's comments and made necessary changes. - Rebased on top Changes from v1: - Addressed Mani's comments and made necessary changes. - Removed the last patch from the series as it became redundant after making changes. This series adds APCS mailbox and clock support for SDX65. The APCS IP in SDX65 provides IPC and clock functionalities. Thanks, Rohit Rohit Agarwal (5): dt-bindings: clock: Add A7 PLL binding for SDX65 clk: qcom: Add A7 PLL support for SDX65 ARM: dts: qcom: sdx65: Add support for A7 PLL clock ARM: dts: qcom: sdx65: Add support for APCS block clk: qcom: Add SDX65 APCS clock controller support Documentation/devicetree/bindings/clock/qcom,a7pll.yaml | 2 +- arch/arm/boot/dts/qcom-sdx65.dtsi | 17 +++++++++++++++++ drivers/clk/qcom/Kconfig | 12 ++++++------ 3 files changed, 24 insertions(+), 7 deletions(-) -- 2.7.4
