On Thu, 3 Feb 2022 at 17:46, Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> wrote: > > The change adds QCOM SM8450 compatible value to the list of QCOM CCI > controller compatibles, the controller found on the SoC is equal to > the ones found on previous SoC generations. > > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt > index 7b9fc0c22eaf..924ad8c03464 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt > +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt > @@ -10,6 +10,7 @@ PROPERTIES: > "qcom,msm8996-cci" > "qcom,sdm845-cci" > "qcom,sm8250-cci" > + "qcom,sm8450-cci" > > - reg > Usage: required > @@ -43,7 +44,8 @@ PROPERTIES: > SUBNODES: > > The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996, > -sdm845 and sm8250), described as subdevices named "i2c-bus@0" and "i2c-bus@1". > +sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0" and > +"i2c-bus@1". > > PROPERTIES: > > -- > 2.33.0 > Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
