The MSM GPIO IRQ controller relies on the parent IRQ controller to set the CPU affinity for the IRQ. And this is only valid if there is any wakeup parent available and defined in DT. For the case of no parent IRQ controller defined in DT, msm_gpio_irq_set_affinity() and msm_gpio_irq_set_vcpu_affinity() should return -EINVAL instead of 0 as the affinity can't be set. Otherwise, below warning will be printed by genirq: genirq: irq_chip msmgpio did not update eff. affinity mask of irq 70 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> --- drivers/pinctrl/qcom/pinctrl-msm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 8476a8ac4451..a42ff4b22a04 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1157,7 +1157,7 @@ static int msm_gpio_irq_set_affinity(struct irq_data *d, if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) return irq_chip_set_affinity_parent(d, dest, force); - return 0; + return -EINVAL; } static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) @@ -1168,7 +1168,7 @@ static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) return irq_chip_set_vcpu_affinity_parent(d, vcpu_info); - return 0; + return -EINVAL; } static void msm_gpio_irq_handler(struct irq_desc *desc) -- 2.25.1
