This binding is not much validating the old DSI v2.
Currently we don't differentiate old v2 from new versions,
so we need to figure out how to validate them.
I propose specific compatible depending on mdss version, but I would be
glad, if someone with deeper knowledge proposed the names.
I'm willing to implement it then and back from autodetection.
David
---
.../display/msm/dsi-controller-main.yaml | 53 ++++++++++++-------
1 file changed, 35 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 35426fde8610..6688ddcd7526 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -27,22 +27,34 @@ properties:
maxItems: 1
clocks:
- items:
- - description: Display byte clock
- - description: Display byte interface clock
- - description: Display pixel clock
- - description: Display escape clock
- - description: Display AHB clock
- - description: Display AXI clock
+ oneOf:
+ - minItems: 7 # APQ8064
+ maxItems: 7
+ - items:
+ - description: Display byte clock
+ - description: Display byte interface clock
+ - description: Display pixel clock
+ - description: Display escape clock
+ - description: Display AHB clock
+ - description: Display AXI clock
clock-names:
- items:
- - const: byte
- - const: byte_intf
- - const: pixel
- - const: core
- - const: iface
- - const: bus
+ oneOf:
+ - items: # DSI v2 (APQ8064)
+ - const: iface # from dsi_v2_bus_clk_names
+ - const: bus
+ - const: core_mmss
+ - const: src # from dsi_clk_init_v2
+ - const: byte # from dsi_clk_init
+ - const: pixel
+ - const: core
+ - items:
+ - const: byte
+ - const: byte_intf
+ - const: pixel
+ - const: core
+ - const: iface
+ - const: bus
phys:
maxItems: 1
@@ -66,15 +78,17 @@ properties:
assigned-clocks:
minItems: 2
- maxItems: 2
+ maxItems: 4
description: |
Parents of "byte" and "pixel" for the given platform.
+ For older v2, "byte", "esc", "src" and "pixel".
assigned-clock-parents:
minItems: 2
- maxItems: 2
+ maxItems: 4
description: |
The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
+ For older v2, Byte, Escape, Source and Pixel clock PLL outputs.
power-domains:
maxItems: 1
@@ -124,6 +138,9 @@ properties:
- port@0
- port@1
+patternProperties:
+ '^(avdd|vdd|vdda)-supply$': true # FIXME only APQ8064 supplies
+
required:
- compatible
- reg
@@ -135,8 +152,8 @@ required:
- phy-names
- assigned-clocks
- assigned-clock-parents
- - power-domains
- - operating-points-v2
+ # - power-domains # v2 doesn't seems to need it?
+ # - operating-points-v2 # v2 doesn't have opp implemented yet
- ports
additionalProperties: false
--
2.34.1
