After comparing upstream and downstream Qualcomm PCIe drivers, change
the way the driver works with the pipe_clk_src multiplexing.
The clock should be switched to using ref_clk (TCXO) as a parent before
turning the PCIE_x_GDSC power domain off and can be switched to using
PHY's pipe_clk after this power domain is turned on.
Downstream driver uses regulators for the GDSC, so current approach also
(incorrectly) uses them. However upstream driver uses power-domain and
so GDSC is maintained using pm_runtime_foo() calls. Change order of
operations to implement these requirements.
----------------------------------------------------------------
Dmitry Baryshkov (3):
PCI: qcom: Balance pm_runtime_foo() calls
PCI: qcom: Fix pipe_clk_src reparenting
PCI: qcom: Remove unnecessary pipe_clk handling
drivers/pci/controller/dwc/pcie-qcom.c | 122 +++++++--------------------------
1 file changed, 25 insertions(+), 97 deletions(-)
