On Thu, 9 Dec 2021 at 17:11, Robert Foss <robert.foss@xxxxxxxxxx> wrote: > > On Wed, 8 Dec 2021 at 03:22, Dmitry Baryshkov > <dmitry.baryshkov@xxxxxxxxxx> wrote: > > > > To stop disp_cc_mdss_mdp_clk_src from getting stuck during boot if it > > was enabled by the bootloader, part it to the TCXO clock source. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > --- > > drivers/clk/qcom/dispcc-sdm845.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c > > index 735adfefc379..f2afbba7bc72 100644 > > --- a/drivers/clk/qcom/dispcc-sdm845.c > > +++ b/drivers/clk/qcom/dispcc-sdm845.c > > @@ -858,6 +858,9 @@ static int disp_cc_sdm845_probe(struct platform_device *pdev) > > > > clk_fabia_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); > > > > + /* Park disp_cc_mdss_mdp_clk_src */ > > + clk_rcg2_park_safely(regmap, 0x2088, 0); > > Could the hardcoded number be replaced with > disp_cc_mdss_mdp_clk_src.cmd_rcgr just to make this easier to read? > Maybe the comment isn't needed with this change. Nice idea! > > > + > > /* Enable hardware clock gating for DSI and MDP clocks */ > > regmap_update_bits(regmap, 0x8000, 0x7f0, 0x7f0); > > > > Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx> -- With best wishes Dmitry
