On Mar 17, 2014, at 12:31 PM, Christopher Covington <cov@xxxxxxxxxxxxxx> wrote: > Hi Stephen, > > On 03/11/2014 05:24 PM, Stephen Boyd wrote: >> The architected timer is not a register addressable piece of >> hardware. Instead it's accessed through cp15 accessors. Move it >> to the root of the devicetree to reflect this. > > I find this confusing, perhaps due to overloading of the word "register". > Aren't CP15's a class of coprocessor _registers_? Could it perhaps be clearer > to talk about memory-mapped versus CP15-mapped timers? > > Is "soc" documented somewhere or is it just a name for a container? Assuming > the latter, it's not obvious to me why being a child of a system on chip node > would imply having memory mapped registers. “soc” is a container, since its compatible = "simple-bus”, this implies memory mapped register access for nodes inside of it. - k -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
