On 01/08/14 16:53, Courtney Cavin wrote: > On Mon, Dec 30, 2013 at 09:14:14PM +0100, Stephen Boyd wrote: >> Krait CPUs have a handful of L2 cache controller registers that >> live behind a cp15 based indirection register. First you program >> the indirection register (l2cpselr) to point the L2 'window' >> register (l2cpdr) at what you want to read/write. Then you >> read/write the 'window' register to do what you want. The >> l2cpselr register is not banked per-cpu so we must lock around >> accesses to it to prevent other CPUs from re-pointing l2cpdr >> underneath us. >> >> Cc: Mark Rutland <mark.rutland@xxxxxxx> >> Cc: Russell King <linux@xxxxxxxxxxxxxxxx> >> Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> >> --- >> arch/arm/common/Kconfig | 3 ++ >> arch/arm/common/Makefile | 1 + >> arch/arm/common/krait-l2-accessors.c | 58 +++++++++++++++++++++++++++++++ >> arch/arm/include/asm/krait-l2-accessors.h | 20 +++++++++++ >> 4 files changed, 82 insertions(+) >> create mode 100644 arch/arm/common/krait-l2-accessors.c >> create mode 100644 arch/arm/include/asm/krait-l2-accessors.h > [...] >> + >> +extern void set_l2_indirect_reg(u32 addr, u32 val); >> +extern u32 get_l2_indirect_reg(u32 addr); > As these are Krait specific, please rename the functions to reflect > this. > Ok. Borislav, should I resend to add krait_ before these functions? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
