On 01/07/14 15:07, Borislav Petkov wrote: > On Mon, Dec 30, 2013 at 12:14:14PM -0800, Stephen Boyd wrote: >> Krait CPUs have a handful of L2 cache controller registers that >> live behind a cp15 based indirection register. First you program >> the indirection register (l2cpselr) to point the L2 'window' >> register (l2cpdr) at what you want to read/write. Then you >> read/write the 'window' register to do what you want. The >> l2cpselr register is not banked per-cpu so we must lock around >> accesses to it to prevent other CPUs from re-pointing l2cpdr >> underneath us. >> >> Cc: Mark Rutland <mark.rutland@xxxxxxx> >> Cc: Russell King <linux@xxxxxxxxxxxxxxxx> >> Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> >> --- >> arch/arm/common/Kconfig | 3 ++ >> arch/arm/common/Makefile | 1 + >> arch/arm/common/krait-l2-accessors.c | 58 +++++++++++++++++++++++++++++++ >> arch/arm/include/asm/krait-l2-accessors.h | 20 +++++++++++ > I'm no ARM guy but out of curiosity, why is this code not part of the > krait edac driver? IOW, is there a compelling reason for it to be in > arch/arm/common/? This is used for more than just the edac driver. In the future, we'll need this for the cpufreq driver and the l2 performance monitor driver. I suppose I could have stated that in the commit text. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
