On Tue, Jul 30, 2013 at 8:22 AM, Georgi Djakov <gdjakov@xxxxxxxxxx> wrote:
> This platform driver adds the support of Secure Digital Host
> Controller Interface compliant controller in MSM chipsets.
>
> [snip]
> +
> + sdhc_1: qcom,sdhc@f9824900 {
> + compatible = "qcom,sdhci-msm";
> + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> + reg-names = "hc_mem", "core_mem";
> + interrupts = <0 123 0>, <0 138 0>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + vdd-supply = <&pm8941_l21>;
> + vdd-io-supply = <&pm8941_l13>;
> + qcom,vdd-voltage-level = <2950000 2950000>;
> + qcom,vdd-current-level = <9000 800000>;
> +
> + qcom,vdd-io-always-on;
> + qcom,vdd-io-lpm-sup;
> + qcom,vdd-io-voltage-level = <1800000 2950000>;
> + qcom,vdd-io-current-level = <6 22000>;
> +
> + bus-width = <4>;
> + non-removable;
> + qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
> +
> + gpios = <&msmgpio 40 0>, /* CLK */
> + <&msmgpio 39 0>, /* CMD */
> + <&msmgpio 38 0>, /* DATA0 */
> + <&msmgpio 37 0>, /* DATA1 */
> + <&msmgpio 36 0>, /* DATA2 */
> + <&msmgpio 35 0>; /* DATA3 */
> + qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
I believe these gpio references (and in the rest of the patch) should
be replaced by pinctrl. As far as I can see it provides what you want
and gives you configurability and potential sleep states of those pins
nicely integrated.
Regards,
Bjorn
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