Add the necessary DT data to probe the global clock controller
on MSM8960 devices.
Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/msm8960-cdp.dts | 72 +++++++++++++++++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index db2060c..76a1817 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -37,6 +37,78 @@
reg = <0xfd510000 0x4000>;
};
+ clock-controller@900000 {
+ compatible = "qcom,gcc-8960", "qcom,gcc";
+ reg = <0x900000 0x4000>;
+
+ clocks {
+ cxo: cxo {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <19200000>;
+ };
+
+ pxo: pxo {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <27000000>;
+ };
+
+ pll8: pll8 {
+ #clock-cells = <0>;
+ compatible = "qcom,pll";
+ clocks = <&pxo>;
+ };
+
+ vpll8: vpll8 {
+ #clock-cells = <0>;
+ compatible = "qcom,pll-vote";
+ clocks = <&pll8>;
+ };
+
+ gsbi5_uart_rcg: gsbi5_uart_rcg {
+ #clock-cells = <0>;
+ compatible = "qcom,p2-mn16-clock";
+ clocks = <&pxo>, <&vpll8>;
+ };
+
+ gsbi5_uart_clk: gsbi5_uart_cxc {
+ #clock-cells = <0>;
+ compatible = "qcom,cxc-clock";
+ clocks = <&gsbi5_uart_rcg>;
+ };
+
+ gsbi6_uart_rcg: gsbi6_uart_rcg {
+ #clock-cells = <0>;
+ compatible = "qcom,p2-mn16-clock";
+ clocks = <&pxo>, <&vpll8>;
+ };
+
+ gsbi6_uart_clk: gsbi6_uart_cxc {
+ #clock-cells = <0>;
+ compatible = "qcom,cxc-clock";
+ clocks = <&gsbi6_uart_rcg>;
+ };
+
+ gsbi5_uart_ahb: gsbi5_uart_ahb {
+ #clock-cells = <0>;
+ compatible = "qcom,cxc-hg-clock";
+ };
+
+ gsbi5_qup_rcg: gsbi5_qup_rcg {
+ #clock-cells = <0>;
+ compatible = "qcom,p2-mn8-clock";
+ clocks = <&pxo>, <&vpll8>;
+ };
+
+ gsbi5_qup_clk: gsbi5_qup_cxc {
+ #clock-cells = <0>;
+ compatible = "qcom,cxc-clock";
+ clocks = <&gsbi5_qup_rcg>;
+ };
+ };
+ };
+
serial@16440000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x16440000 0x1000>,
--
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