On Thu, May 23, 2013 at 10:54:26AM -0700, Stephen Boyd wrote: > On 05/15/13 12:38, Stephen Boyd wrote: > > On 05/08/13 14:47, Stephen Boyd wrote: > >> From: Brian Swetland <swetland@xxxxxxxxxx> > >> > >> Currently v7 CPUs with an MIDR that has no bits set in the range > >> [16:12] will be detected as old ARM CPUs with no caches and so > >> the cache will never be turned on during decompression. ARM's > >> Cortex chips have an 0xC in the range [16:12] so they never match > >> this entry, but Qualcomm's Scorpion and Krait processors never > >> set these bits to anything besides 0 so they always match. > >> > >> Skip this entry if we've compiled in support for v7 CPUs. This > >> allows kernel decompression to happen nearly instantly instead of > >> taking over 20 seconds. > >> > >> Signed-off-by: Brian Swetland <swetland@xxxxxxxxxx> > >> [sboyd: Clarified and extended commit text] > >> Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> > >> --- > > Ping? > > Russell, shall I add this to the patch tracker? Yes please. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
