On 14 December 2010 04:50, Jeff Ohlstein <johlstei@xxxxxxxxxxxxxx> wrote:
> --- /dev/null
> +++ b/arch/arm/mach-msm/headsmp.S
[...]
> +ENTRY(msm_secondary_startup)
> +    mrc   p15, 0, r0, c0, c0, 5  @ MPIDR
> +    and   r0, r0, #15       @ What CPU am I
> +    adr   r4, 1f         Â@ address of
> +    ldmia  r4, {r5, r6}      Â@ load curr addr and pen_rel addr
> +    sub   r4, r4, r5       Â@ determine virtual/phys offsets
> +    add   r6, r6, r4       Â@ apply
> +pen:
> + Â Â Â wfe
> +    dsb               @ ensure subsequent access is
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â @ after event
As I wrote in a different e-mail, this DSB isn't actually needed as
the processor shouldn't speculate beyond the WFE. But it's harmless
anyway.
> --- /dev/null
> +++ b/arch/arm/mach-msm/platsmp.c
[...]
> +int boot_secondary(unsigned int cpu, struct task_struct *idle)
> +{
> + Â Â Â static int cold_boot_done;
> + Â Â Â unsigned long timeout;
> + Â Â Â printk(KERN_DEBUG "Starting secondary CPU %d\n", cpu);
> +
> + Â Â Â if (cold_boot_done == false) {
> + Â Â Â Â Â Â Â prepare_cold_cpu(cpu);
> + Â Â Â Â Â Â Â cold_boot_done = true;
> + Â Â Â }
> +
> + Â Â Â pen_release = cpu;
> + Â Â Â __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
> + Â Â Â outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
> + Â Â Â __asm__("sev");
> + Â Â Â dsb();
What's the need for the dsb() here (one before SEV maybe)?
Also, do we need to add a "memory" clobber to the SEV asm, not sure
whether the compiler would try to reorder the code.
--
Catalin
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