On Wed, Nov 13, 2024, at 13:03, Suravee Suthikulpanit wrote:
> According to the AMD IOMMU spec, IOMMU hardware reads the entire DTE
> in a single 256-bit transaction. It is recommended to update DTE using
> 128-bit operation followed by an INVALIDATE_DEVTAB_ENTYRY command when
> the IV=1b or V=1b before the change.
>
> According to the AMD BIOS and Kernel Developer's Guide (BDKG) dated back
> to family 10h Processor [1], which is the first introduction of AMD IOMMU,
> AMD processor always has CPUID Fn0000_0001_ECX[CMPXCHG16B]=1.
> Therefore, it is safe to assume cmpxchg128 is available with all AMD
> processor w/ IOMMU.
Makes sense. More specifically, I'm fairly sure the only x86-64
CPUs without cmpxchg16b are very early NetBurst Xeons, while AMD
had the instruction from the start, and dropping the runtime check
entirely would work just as well.
Arnd
