On 04.10.24 12:05, Niels Dettenbach wrote:
Virtual machines under Xen Hypervisor (DomU) running in Xen PV mode use a special, nonstandard synthetized CPU topology which "just works" under kernels 6.9.x while newer kernels wrongly assuming a "crash kernel" and disable SMP (reducing to one CPU core) because the newer topology implementation produces a wrong error "[Firmware Bug]: APIC enumeration order not specification compliant" after new topology checks which are improper for Xen PV platform. As a result, the kernel disables SMP and activates just one CPU core within the PV DomU "VM" (DomU in PV mode). The patch disables the regarding checks if it is running in Xen PV mode (only) and bring back SMP / all CPUs as in the past to such DomU VMs. The Xen subsystem takes care of the proper interaction between "guest" (DomU) and the "host" (Dom0). Signed-off-by: Niels Dettenbach <nd@xxxxxxxxxxxx>
Does the attached patch instead of yours help? Compile tested only. Juergen
From 2d48fb9ddca0aa6510f4f18966112222d405aedc Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@xxxxxxxx>
Date: Fri, 4 Oct 2024 12:22:12 +0200
Subject: [PATCH] x86/xen: mark boot CPU of PV guest in MSR_IA32_APICBASE
Recent topology checks of the x86 boot code uncovered the need for
PV guests to have the boot cpu marked in the APICBASE MSR.
Fixes: 9d22c96316ac ("x86/topology: Handle bogus ACPI tables correctly")
Reported-by: Niels Dettenbach <nd@xxxxxxxxxxxx>
Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
---
arch/x86/xen/enlighten_pv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 2c12ae42dc8b..d6818c6cafda 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1032,6 +1032,10 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
switch (msr) {
case MSR_IA32_APICBASE:
val &= ~X2APIC_ENABLE;
+ if (smp_processor_id() == 0)
+ val |= MSR_IA32_APICBASE_BSP;
+ else
+ val &= ~MSR_IA32_APICBASE_BSP;
break;
}
return val;
--
2.43.0
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