On Mon, May 13, 2024 at 07:44:00AM -0700, Boqun Feng wrote: > On Wed, May 01, 2024 at 04:01:26PM -0700, Paul E. McKenney wrote: > > Architectures are required to provide four-byte cmpxchg() and 64-bit > > architectures are additionally required to provide eight-byte cmpxchg(). > > However, there are cases where one-byte cmpxchg() would be extremely > > useful. Therefore, provide cmpxchg_emu_u8() that emulates one-byte > > cmpxchg() in terms of four-byte cmpxchg(). > > > > Note that this emulations is fully ordered, and can (for example) cause > > one-byte cmpxchg_relaxed() to incur the overhead of full ordering. > > If this causes problems for a given architecture, that architecture is > > free to provide its own lighter-weight primitives. > > > > [ paulmck: Apply Marco Elver feedback. ] > > [ paulmck: Apply kernel test robot feedback. ] > > [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] > > > > Link: https://lore.kernel.org/all/0733eb10-5e7a-4450-9b8a-527b97c842ff@paulmck-laptop/ > > > > Signed-off-by: Paul E. McKenney <paulmck@xxxxxxxxxx> > > Acked-by: Marco Elver <elver@xxxxxxxxxx> > > Cc: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx> > > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > > Cc: "Peter Zijlstra (Intel)" <peterz@xxxxxxxxxxxxx> > > Cc: Douglas Anderson <dianders@xxxxxxxxxxxx> > > Cc: Petr Mladek <pmladek@xxxxxxxx> > > Cc: Arnd Bergmann <arnd@xxxxxxxx> > > Cc: <linux-arch@xxxxxxxxxxxxxxx> > > --- > > arch/Kconfig | 3 +++ > > include/linux/cmpxchg-emu.h | 15 +++++++++++++ > > lib/Makefile | 1 + > > lib/cmpxchg-emu.c | 45 +++++++++++++++++++++++++++++++++++++ > > 4 files changed, 64 insertions(+) > > create mode 100644 include/linux/cmpxchg-emu.h > > create mode 100644 lib/cmpxchg-emu.c > > > > diff --git a/arch/Kconfig b/arch/Kconfig > > index 9f066785bb71d..284663392eef8 100644 > > --- a/arch/Kconfig > > +++ b/arch/Kconfig > > @@ -1609,4 +1609,7 @@ config CC_HAS_SANE_FUNCTION_ALIGNMENT > > # strict alignment always, even with -falign-functions. > > def_bool CC_HAS_MIN_FUNCTION_ALIGNMENT || CC_IS_CLANG > > > > +config ARCH_NEED_CMPXCHG_1_EMU > > + bool > > + > > endmenu > > diff --git a/include/linux/cmpxchg-emu.h b/include/linux/cmpxchg-emu.h > > new file mode 100644 > > index 0000000000000..998deec67740a > > --- /dev/null > > +++ b/include/linux/cmpxchg-emu.h > > @@ -0,0 +1,15 @@ > > +/* SPDX-License-Identifier: GPL-2.0+ */ > > +/* > > + * Emulated 1-byte and 2-byte cmpxchg operations for architectures > > + * lacking direct support for these sizes. These are implemented in terms > > + * of 4-byte cmpxchg operations. > > + * > > + * Copyright (C) 2024 Paul E. McKenney. > > + */ > > + > > +#ifndef __LINUX_CMPXCHG_EMU_H > > +#define __LINUX_CMPXCHG_EMU_H > > + > > +uintptr_t cmpxchg_emu_u8(volatile u8 *p, uintptr_t old, uintptr_t new); > > + > > +#endif /* __LINUX_CMPXCHG_EMU_H */ > > diff --git a/lib/Makefile b/lib/Makefile > > index ffc6b2341b45a..cc3d52fdb477d 100644 > > --- a/lib/Makefile > > +++ b/lib/Makefile > > @@ -236,6 +236,7 @@ obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o > > lib-$(CONFIG_GENERIC_BUG) += bug.o > > > > obj-$(CONFIG_HAVE_ARCH_TRACEHOOK) += syscall.o > > +obj-$(CONFIG_ARCH_NEED_CMPXCHG_1_EMU) += cmpxchg-emu.o > > > > obj-$(CONFIG_DYNAMIC_DEBUG_CORE) += dynamic_debug.o > > #ensure exported functions have prototypes > > diff --git a/lib/cmpxchg-emu.c b/lib/cmpxchg-emu.c > > new file mode 100644 > > index 0000000000000..27f6f97cb60dd > > --- /dev/null > > +++ b/lib/cmpxchg-emu.c > > @@ -0,0 +1,45 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Emulated 1-byte cmpxchg operation for architectures lacking direct > > + * support for this size. This is implemented in terms of 4-byte cmpxchg > > + * operations. > > + * > > + * Copyright (C) 2024 Paul E. McKenney. > > + */ > > + > > +#include <linux/types.h> > > +#include <linux/export.h> > > +#include <linux/instrumented.h> > > +#include <linux/atomic.h> > > +#include <linux/panic.h> > > +#include <linux/bug.h> > > +#include <asm-generic/rwonce.h> > > +#include <linux/cmpxchg-emu.h> > > + > > +union u8_32 { > > + u8 b[4]; > > + u32 w; > > +}; > > + > > +/* Emulate one-byte cmpxchg() in terms of 4-byte cmpxchg. */ > > +uintptr_t cmpxchg_emu_u8(volatile u8 *p, uintptr_t old, uintptr_t new) > > +{ > > + u32 *p32 = (u32 *)(((uintptr_t)p) & ~0x3); > > + int i = ((uintptr_t)p) & 0x3; > > + union u8_32 old32; > > + union u8_32 new32; > > + u32 ret; > > + > > + ret = READ_ONCE(*p32); > > + do { > > + old32.w = ret; > > + if (old32.b[i] != old) > > + return old32.b[i]; > > + new32.w = old32.w; > > + new32.b[i] = new; > > + instrument_atomic_read_write(p, 1); > > + ret = data_race(cmpxchg(p32, old32.w, new32.w)); // Overridden above. > > Just out of curiosity, why is this `data_race` needed? cmpxchg is atomic > so there should be no chance for a data race? That is what I thought, too. ;-) The problem is that the cmpxchg() covers 32 bits, and so without that data_race(), KCSAN would complain about data races with perfectly legitimate concurrent accesses to the other three bytes. The instrument_atomic_read_write(p, 1) beforehand tells KCSAN to complain about concurrent accesses, but only to that one byte. Thanx, Paul > Regards, > Boqun > > > + } while (ret != old32.w); > > + return old; > > +} > > +EXPORT_SYMBOL_GPL(cmpxchg_emu_u8); > > -- > > 2.40.1 > >
