On Thu, Feb 22, 2024 at 10:05:04PM +0000, David Laight wrote:
> From: Jason Gunthorpe
> > Sent: 21 February 2024 01:17
> >
> > The kernel provides driver support for using write combining IO memory
> > through the __iowriteXX_copy() API which is commonly used as an optional
> > optimization to generate 16/32/64 byte MemWr TLPs in a PCIe environment.
> >
> ...
> > Implement __iowrite32/64_copy() specifically for ARM64 and use inline
> > assembly to build consecutive blocks of STR instructions. Provide direct
> > support for 64/32/16 large TLP generation in this manner. Optimize for
> > common constant lengths so that the compiler can directly inline the store
> > blocks.
> ...
> > +/*
> > + * This generates a memcpy that works on a from/to address which is aligned to
> > + * bits. Count is in terms of the number of bits sized quantities to copy. It
> > + * optimizes to use the STR groupings when possible so that it is WC friendly.
> > + */
> > +#define memcpy_toio_aligned(to, from, count, bits) \
> > + ({ \
> > + volatile u##bits __iomem *_to = to; \
> > + const u##bits *_from = from; \
> > + size_t _count = count; \
> > + const u##bits *_end_from = _from + ALIGN_DOWN(_count, 8); \
> > + \
> > + for (; _from < _end_from; _from += 8, _to += 8) \
> > + __const_memcpy_toio_aligned##bits(_to, _from, 8); \
> > + if ((_count % 8) >= 4) {
>
> If (_count & 4) {
That would be obfuscating, IMHO. The compiler doesn't need such things
to generate optimal code.
> > + __const_memcpy_toio_aligned##bits(_to, _from, 1); \
> > + })
>
> But that looks bit a bit large to be inlined.
You trimmed alot, this #define is in a C file and it is a template to
generate the 32 and 64 bit out of line functions. Things are done like
this because the 32/64 version are exactly the same logic except just
with different types and sizes.
Jason
