On Wed, Jan 24, 2024 at 10:21:26PM -0800, debug@xxxxxxxxxxxx wrote: > From: Deepak Gupta <debug@xxxxxxxxxxxx> > > This patch abstracts envcfg CSR in kernel (as is done for other homonyn > CSRs). CSR_ENVCFG is used as alias for CSR_SENVCFG or CSR_MENVCFG depending > on how kernel is compiled. > > Additionally it changes CBZE enabling to start using CSR_ENVCFG instead of > CSR_SENVCFG. > > Signed-off-by: Deepak Gupta <debug@xxxxxxxxxxxx> > --- > arch/riscv/include/asm/csr.h | 2 ++ > arch/riscv/kernel/cpufeature.c | 2 +- > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > index 306a19a5509c..b3400517b0a9 100644 > --- a/arch/riscv/include/asm/csr.h > +++ b/arch/riscv/include/asm/csr.h > @@ -415,6 +415,7 @@ > # define CSR_STATUS CSR_MSTATUS > # define CSR_IE CSR_MIE > # define CSR_TVEC CSR_MTVEC > +# define CSR_ENVCFG CSR_MENVCFG > # define CSR_SCRATCH CSR_MSCRATCH > # define CSR_EPC CSR_MEPC > # define CSR_CAUSE CSR_MCAUSE > @@ -439,6 +440,7 @@ > # define CSR_STATUS CSR_SSTATUS > # define CSR_IE CSR_SIE > # define CSR_TVEC CSR_STVEC > +# define CSR_ENVCFG CSR_SENVCFG > # define CSR_SCRATCH CSR_SSCRATCH > # define CSR_EPC CSR_SEPC > # define CSR_CAUSE CSR_SCAUSE > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index b3785ffc1570..98623393fd1f 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -725,7 +725,7 @@ arch_initcall(check_unaligned_access_all_cpus); > void riscv_user_isa_enable(void) > { > if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ)) > - csr_set(CSR_SENVCFG, ENVCFG_CBZE); > + csr_set(CSR_ENVCFG, ENVCFG_CBZE); > } > > #ifdef CONFIG_RISCV_ALTERNATIVE > -- > 2.43.0 > Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>