Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@xxxxxxxxxxxx>:
On Mon, 30 Oct 2023 14:30:24 +0100 you wrote:
> This series optimizes the tlb flushes on riscv which used to simply
> flush the whole tlb whatever the size of the range to flush or the size
> of the stride.
>
> Patch 3 introduces a threshold that is microarchitecture specific and
> will very likely be modified by vendors, not sure though which mechanism
> we'll use to do that (dt? alternatives? vendor initialization code?).
>
> [...]
Here is the summary with links:
- [v6,1/4] riscv: Improve tlb_flush()
https://git.kernel.org/riscv/c/c5e9b2c2ae82
- [v6,2/4] riscv: Improve flush_tlb_range() for hugetlb pages
https://git.kernel.org/riscv/c/c962a6e74639
- [v6,3/4] riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb
https://git.kernel.org/riscv/c/9d4e8d5fa7db
- [v6,4/4] riscv: Improve flush_tlb_kernel_range()
https://git.kernel.org/riscv/c/5e22bfd520ea
You are awesome, thank you!
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