From: Dexuan Cui <decui@xxxxxxxxxxxxx> Sent: Thursday, August 24, 2023 1:07 AM > > When the paravisor is present, a SNP VM must use GHCB to access some > special MSRs, including HV_X64_MSR_GUEST_OS_ID and some SynIC MSRs. > > Similarly, when the paravisor is present, a TDX VM must use TDX GHCI > to access the same MSRs. > > Implement hv_tdx_msr_write() and hv_tdx_msr_read(), and use the helper > functions hv_ivm_msr_read() and hv_ivm_msr_write() to access the MSRs > in a unified way for SNP/TDX VMs with the paravisor. > > Do not export hv_tdx_msr_write() and hv_tdx_msr_read(), because we never > really used hv_ghcb_msr_write() and hv_ghcb_msr_read() in any module. > > Update arch/x86/include/asm/mshyperv.h so that the kernel can still build > if CONFIG_AMD_MEM_ENCRYPT or CONFIG_INTEL_TDX_GUEST is not set, or > neither is set. > > Signed-off-by: Dexuan Cui <decui@xxxxxxxxxxxxx> > --- > > Changes in v2: None > > Changes in v3: > hv_tdx_read_msr -> hv_tdx_msr_read > hv_tdx_write_msr -> hv_tdx_msr_write > Do not export hv_tdx_msr_write() and hv_tdx_msr_read(). > included <uapi/asm/vmx.h> > Updated arch/x86/include/asm/mshyperv.h so that the kernel > can still build if CONFIG_AMD_MEM_ENCRYPT and/or > CONFIG_INTEL_TDX_GUEST are not set. > > arch/x86/hyperv/hv_init.c | 8 ++-- > arch/x86/hyperv/ivm.c | 69 +++++++++++++++++++++++++++++++-- > arch/x86/include/asm/mshyperv.h | 8 ++-- > arch/x86/kernel/cpu/mshyperv.c | 8 ++-- > 4 files changed, 77 insertions(+), 16 deletions(-) Reviewed-by: Michael Kelley <mikelley@xxxxxxxxxxxxx>
