Re: [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms

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To: "Michael Kelley (LINUX)" <mikelley@xxxxxxxxxxxxx>
Subject: Re: [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms
From: Borislav Petkov <bp@xxxxxxxxx>
Date: Mon, 20 Mar 2023 19:16:46 +0100
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On Mon, Mar 20, 2023 at 01:30:54PM +0000, Michael Kelley (LINUX) wrote:
> In a vTOM VM, CPUID leaf 0x8000001f is filtered so it does *not* return
> Bit 1 (SEV) as set.  Consequently, sme_enable() does not read MSR_AMD64_SEV
> and does not populate sev_status.

So how much of the hardware side of vTOM are you actually using besides
the actual encryption?

Virtual TOM MSR (C001_0135)? Anything else?

AFAICT, you're passing the vTOM value from CPUID from the hypervisor so
I'm guessing that happens underneath in the hypervisor?

I'd like to make sure there are no more "surprises" down the road...

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Follow-Ups:
- RE: [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms
  - From: Michael Kelley (LINUX)

References:
- [PATCH v6 00/13] Add PCI pass-thru support to Hyper-V Confidential VMs
  - From: Michael Kelley
- [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms
  - From: Michael Kelley
- Re: [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms
  - From: Borislav Petkov
- RE: [PATCH v6 06/13] x86/hyperv: Change vTOM handling to use standard coco mechanisms
  - From: Michael Kelley (LINUX)

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