Hi all, Some time ago two different patches have been posted to fix stale TLB entries that caused applications crashes. The patch [0] suggested 'aggregating' mm_cpumask, i.e. current cpu is not cleared for the switched-out task in switch_mm function. For additional explanations see the commit message by Guo Ren. The same approach is used by arc architecture, so another good comment is for switch_mm in arch/arc/include/asm/mmu_context.h. The patch [1] attempted to reduce the number of TLB flushes by deferring (and possibly avoiding) them for CPUs not running the task. Patch [1] has been merged. However we already have two bug reports from different vendors. So apparently something is missing in the approach suggested in [1]. In both cases the patch [0] fixed the issue. This patch series reverts [1] and replaces it by [0]. Regards, Sergey [0] https://lore.kernel.org/linux-riscv/20221111075902.798571-1-guoren@xxxxxxxxxx/ [1] https://lore.kernel.org/linux-riscv/20220829205219.283543-1-geomatsi@xxxxxxxxx/ Guo Ren (1): riscv: asid: Fixup stale TLB entry cause application crash Sergey Matyukevich (1): Revert "riscv: mm: notify remote harts about mmu cache updates" arch/riscv/include/asm/mmu.h | 2 -- arch/riscv/include/asm/tlbflush.h | 18 -------------- arch/riscv/mm/context.c | 40 +++++++++++++++---------------- arch/riscv/mm/tlbflush.c | 28 +++++++++++++--------- 4 files changed, 37 insertions(+), 51 deletions(-) -- 2.39.2
