Hi Matthew,
On 16/02/23 17:26, Matthew Wilcox wrote:
On Thu, Feb 16, 2023 at 01:59:44PM +1300, Michael Schmitz wrote:
Matthew,
On 16/02/23 09:09, Matthew Wilcox (Oracle) wrote:
Add set_ptes(), update_mmu_cache_range(), flush_icache_pages() and
flush_dcache_folio(). I'm not entirely certain that the 040/060 case
in __flush_pages_to_ram() is correct.
I'm pretty sure you need to iterate to hit each of the pages - the code as
is will only push cache entries for the first page.
Quoting the 040 UM:
"Both instructions [cinv, cpush] allow operation on a single cache line, all
cache lines in a specific page, or an entire cache, and can select one or
both caches for the operation. For line and page operations, a physical
address in an address register specifies the memory address."
I actually found that! What I didn't find was how to tell if this
cpush insn is the one which is operating on a single cache line,
a single page, or the entire cache.
So I should do a loop around this asm and call it once for each page
we're flushing?
Yes, that's the idea. I'm uncertain whether contiguous virtual pages are
always guaranteed to have contiguous physical mappings, so no point in
trying to 'optimize' and shift the loop into inline assembly.
Cheers,
Michael
