On Mon, Sep 19, 2022 at 9:34 PM Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
>
> On Sun, Sep 18, 2022 at 11:52:42AM -0400, guoren@xxxxxxxxxx wrote:
>
> > @@ -123,18 +126,22 @@ int handle_misaligned_store(struct pt_regs *regs);
> >
> > asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
> > {
> > + irqentry_state_t state = irqentry_enter(regs);
> > if (!handle_misaligned_load(regs))
> > return;
> > do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
> > "Oops - load address misaligned");
> > + irqentry_exit(regs, state);
> > }
> >
> > asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
> > {
> > + irqentry_state_t state = irqentry_enter(regs);
> > if (!handle_misaligned_store(regs))
> > return;
> > do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
> > "Oops - store (or AMO) address misaligned");
> > + irqentry_exit(regs, state);
> > }
> > #endif
> > DO_ERROR_INFO(do_trap_store_fault,
> > @@ -158,6 +165,8 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
> >
> > asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
> > {
> > + irqentry_state_t state = irqentry_enter(regs);
> > +
> > #ifdef CONFIG_KPROBES
> > if (kprobe_single_step_handler(regs))
> > return;
>
> FWIW; on x86 I've classified many of the 'from-kernel' traps as
> NMI-like, since those traps can happen from any context, including with
> IRQs disabled.
The do_trap_break is for ebreak instruction, not NMI. RISC-V NMI has
separate CSR. ref:
This proposal adds support for resumable non-maskable interrupts
(RNMIs) to RISC-V. The extension adds four new CSRs (`mnepc`,
`mncause`, `mnstatus`, and `mnscratch`) to hold the interrupted state,
and a new instruction to resume from the RNMI handler.
>
> The basic shape of the trap handlers looks a little like:
>
> if (user_mode(regs)) {
If nmi comes from user_mode, why we using
irqenrty_enter/exit_from/to_user_mode instead of
irqentry_nmi_enter/exit?
> irqenrty_enter_from_user_mode(regs);
> do_user_trap();
> irqentry_exit_to_user_mode(regs);
> } else {
> irqentry_state_t state = irqentry_nmi_enter(regs);
> do_kernel_trap();
> irqentry_nmi_exit(regs, state);
> }
>
> Not saying you have to match Risc-V in this patch-set, just something to
> consider.
I think the shape of the riscv NMI handler looks a little like this:
asmlinkage __visible __trap_section void do_trap_nmi(struct pt_regs *regs)
{
irqentry_state_t state = irqentry_nmi_enter(regs);
do_nmi_trap();
irqentry_nmi_exit(regs, state);
}
--
Best Regards
Guo Ren
