On Wed, Jun 29, 2022 at 4:30 PM Arnd Bergmann <arnd@xxxxxxxx> wrote: > > On Wed, Jun 29, 2022 at 10:24 AM Guo Ren <guoren@xxxxxxxxxx> wrote: > > On Wed, Jun 29, 2022 at 3:09 PM Arnd Bergmann <arnd@xxxxxxxx> wrote: > > > On Wed, Jun 29, 2022 at 3:34 AM Waiman Long <longman@xxxxxxxxxx> wrote: > > > > > > From looking at the header file dependencies on arm64, I know that > > > putting jump labels into core infrastructure like the arch_spin_lock() > > > makes a big mess of indirect includes and measurably slows down > > > the kernel build. > > arm64 needn't combo spinlock, it could use pure qspinlock with keeping > > current header files included. > > arm64 has a different problem: there are two separate sets of atomic > instructions, and the decision between those is similarly done using > jump labels. I definitely like the ability to choose between qspinlock > and ticket spinlock on arm64 as well. This can be done as a > compile-time choice, but both of them still depend on jump labels. 1. xchg use ALTERNATIVE, but cmpxchg to jump labels. 2. arm64 is still using qspinlock when ll/sc, and I think they give strong enough fwd guarantee with "prfm pstl1strm". But another question is if ll/sc could give enough strong fwd guarantee, why arm64 introduce LSE, for code size reduction? Why instructions fusion technology is not enough? > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
