On Tue, Jun 21, 2022 at 5:16 AM Waiman Long <longman@xxxxxxxxxx> wrote: > > > On 6/20/22 16:42, Arnd Bergmann wrote: > > On Mon, Jun 20, 2022 at 5:54 PM <guoren@xxxxxxxxxx> wrote: > >>> +config RISCV_USE_QUEUED_SPINLOCKS > >> + bool "Using queued spinlock instead of ticket-lock" > > Maybe we can just make ARCH_USE_QUEUED_SPINLOCKS > > user visible and give users the choice between the two generic > > implementations across all architectures that support the qspinlock > > variant. > > > > In arch/riscv, you'd then just have a > > > > select ARCH_HAVE_QUEUED_SPINLOCKS > > > > diff --git a/arch/riscv/include/asm/spinlock.h > > b/arch/riscv/include/asm/spinlock.h > >> new file mode 100644 > >> index 000000000000..fd3fd09cff52 > >> --- /dev/null > >> +++ b/arch/riscv/include/asm/spinlock.h > >> @@ -0,0 +1,12 @@ > >> +/* SPDX-License-Identifier: GPL-2.0 */ > >> +#ifndef __ASM_SPINLOCK_H > >> +#define __ASM_SPINLOCK_H > >> + > >> +#ifdef CONFIG_ARCH_USE_QUEUED_SPINLOCKS > >> +#include <asm/qspinlock.h> > >> +#include <asm/qrwlock.h> > >> +#else > >> +#include <asm-generic/spinlock.h> > >> +#endif > >> + > > Along the same lines: > > > > I think I'd prefer the header changes to be done in the asm-generic > > version of this file, so this can be shared across all architectures > > that want to give the choice between ticket and queued spinlock. > > I concur. Qspinlock is only needed if we want to support systems with a > large number of CPUs. For systems with a small number of CPUs. It > doesn't matter if qspinlock or the ticket lock is being used. RISC-V has had NUMA scenario. Think two AI chips with CCIX ports, they could be flexibly connected when needed. > > Cheers, > Longman > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
