LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its boot protocol LoongArch-specific interrupt controllers (similar to APIC) are already added in the next revision of ACPI Specification (current revision is 6.4). This patchset is adding basic LoongArch support in mainline kernel, we can see a complete snapshot here: https://github.com/loongson/linux/tree/loongarch-next https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson.git/log/?h=loongarch-next Cross-compile tool chain to build kernel: https://github.com/loongson/build-tools/releases/download/2021.12.21/loongarch64-clfs-2022-03-03-cross-tools-gcc-glibc.tar.xz A CLFS-based Linux distro: https://github.com/loongson/build-tools/releases/download/2021.12.21/loongarch64-clfs-system-2022-03-03.tar.bz2 Open-source tool chain which is under review (Binutils and Gcc are already upstream): https://github.com/loongson/binutils-gdb/tree/upstream_v3.1 https://github.com/loongson/gcc/tree/loongarch_upstream_v6.3 https://github.com/loongson/glibc/tree/loongarch_2_35_dev_v2.2 Loongson and LoongArch documentations: https://github.com/loongson/LoongArch-Documentation LoongArch-specific interrupt controllers: https://mantis.uefi.org/mantis/view.php?id=2203 https://mantis.uefi.org/mantis/view.php?id=2313 V1 -> V2: 1, Add documentation patches; 2, Restore copyright statements; 3, Split the big header patch; 4, Cleanup signal-related headers; 5, Cleanup incomplete 32-bit support; 6, Move the major PCI work to drivers/pci; 7, Rework Loongson64 platform support; 8, Rework lpj and __udelay()/__ndelay(); 9, Rework page table layout config options; 10, Rework syscall/exception/interrupt with generic entry framework; 11, Simplify the VDSO/VSYSCALL implementation; 12, Use generic I/O access macros and functions; 13, Remove unaligned access emulation at present; 14, Keep clocksource code in arch since it is the "native clocksource"; 15, Some other minor fixes and improvements. V2 -> V3: 1, Rebased on 5.15-rc1; 2, Cleanup PCI code on V2; 3, Support multiple msi domain; 4, Support cacheable ioremap(); 5, Use irq stack for interrupt handling; 6, Adjust struct ucontext and rt_sigframe; 7, Some other minor fixes and improvements. V3 -> V4: 1, Rebased on 5.15-rc3; 2, Rework SMP support and remove legacy IPI; 3, Rework signal support and remove loongarch_abi; 4, Simplify phys_to_dma() and dma_to_phys(); 5, Remove unused sys_mmap2() implementation; 6, Remove unused strncpy_user.S and strnlen_user.S; 7, Some other minor fixes and improvements. V4 -> V5: 1, Rebased on 5.15-rc4; 2, Fix a _PAGE_CHG_MASK bug; 3, Fix vdso_base() calculation; 4, Adjust syscall and ptrace code; 5, Use generic bitops implementation; 6, Avoid syscall restart handling in sys_rt_sigreturn(); 7, Update commit messages. V5 -> V6: 1, Rebased on 5.17-rc4; 2, Use GENERIC_IRQ_MIGRATION; 3, Improve sigcontext definition; 4, Improve numa_default_distance(); 5, Increse MINSIGSTKSZ and SIGSTKSZ; 6, Restruct pt_regs and user_pt_regs; 7, Fix a corner case of protection_map; 8, Fix some corner cases of system calls; 9, Separate module region and vmalloc region; 10, Rename registers to match official documents. V6 -> V7: 1, Rebased on 5.17-rc6; 2, Refactor do_page_fault(); 3, Adjust memblock initialization; 4, Use -mstrict-align to build kernel; 5, Reimplement elf_read_implies_exec() as other archs; 6, Some other minor fixes and improvements. V7 -> V8: 1, Rebased on 5.17-rc8; 2, Remove useless abidefs.h; 3, Remove useless HAVE_ARCH_NODEDATA_EXTENSION; 4, Fix and simplify uaccess.h; 5, Fix bugs after pt_regs restruction; 6, Use generic copy_from_user_page()/copy_to_user_page(); 7, Some other minor fixes and improvements. V8 -> V9: 1, Rebased on 5.18-rc4; 2, Fix 4-level page tables; 3, Always use 16KB kernel stack; 4, Add efistub and zboot support; 5, Remove useless HAVE_FUTEX_CMPXCHG; 6, Optimize module machanism for size; 7, Define copy_user_page() to avoid build errors; 8, Some other minor fixes and improvements. V9 -> V10: 1, Rebased on 5.18-rc6; 2, Use generic efi stub; 3, Use generic string library; 4, Use generic ticket spinlock; 5, Use more meaningful macro naming; 6, Remove the zboot patch; 7, Fix commit message and documentations; 8, Some other minor fixes and improvements. V10 -> V11: 1, Rebased on asm-generic tree; 2, Fix fpreg macros definition; 3, Fix ELF ABI macros definition; 4, Fix magic number definition in efi header; 5, Remove unneeded swab.h, bitfield.h and rtc.c; 6, Remove __ARCH_WANT_NEW_STAT (glibc need update); 7, Improve documents as WANG Xuerui suggested; 8, Some other minor fixes and improvements. Huacai Chen(22): Documentation: LoongArch: Add basic documentations. Documentation/zh_CN: Add basic LoongArch documentations. LoongArch: Add elf-related definitions. LoongArch: Add writecombine support for drm. LoongArch: Add build infrastructure. LoongArch: Add CPU definition headers. LoongArch: Add atomic/locking headers. LoongArch: Add other common headers. LoongArch: Add boot and setup routines. LoongArch: Add exception/interrupt handling. LoongArch: Add process management. LoongArch: Add memory management. LoongArch: Add system call support. LoongArch: Add signal handling support. LoongArch: Add elf and module support. LoongArch: Add misc common routines. LoongArch: Add some library functions. LoongArch: Add PCI controller support. LoongArch: Add VDSO and VSYSCALL support. LoongArch: Add multi-processor (SMP) support. LoongArch: Add Non-Uniform Memory Access (NUMA) support. LoongArch: Add Loongson-3 default config file. Signed-off-by: Huacai Chen <chenhuacai@xxxxxxxxxxx> --- Documentation/arch.rst | 1 + Documentation/loongarch/features.rst | 3 + Documentation/loongarch/index.rst | 21 + Documentation/loongarch/introduction.rst | 345 +++++ Documentation/loongarch/irq-chip-model.rst | 168 +++ Documentation/translations/zh_CN/index.rst | 1 + .../translations/zh_CN/loongarch/features.rst | 8 + .../translations/zh_CN/loongarch/index.rst | 26 + .../translations/zh_CN/loongarch/introduction.rst | 318 ++++ .../zh_CN/loongarch/irq-chip-model.rst | 167 +++ arch/loongarch/.gitignore | 9 + arch/loongarch/Kbuild | 6 + arch/loongarch/Kconfig | 434 ++++++ arch/loongarch/Kconfig.debug | 0 arch/loongarch/Makefile | 131 ++ arch/loongarch/boot/Makefile | 78 + arch/loongarch/boot/boot.lds.S | 64 + arch/loongarch/boot/decompress.c | 98 ++ arch/loongarch/boot/string.c | 166 +++ arch/loongarch/boot/zheader.S | 100 ++ arch/loongarch/boot/zkernel.S | 99 ++ arch/loongarch/configs/loongson3_defconfig | 770 ++++++++++ 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