[Cc Andrea]
On Tue, Apr 12, 2022 at 11:49:54AM +0800, guoren@xxxxxxxxxx wrote:
> From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
>
> These patch series contain one cleanup and some optimizations for
> atomic operations.
>
Seems to me that you are basically reverting 5ce6c1f3535f
("riscv/atomic: Strengthen implementations with fences"). That commit
fixed an memory ordering issue, could you explain why the issue no
longer needs a fix?
Regards,
Boqun
> Changes in V2:
> - Fixup LR/SC memory barrier semantic problems which pointed by
> Rutland
> - Combine patches into one patchset series
> - Separate AMO optimization & LRSC optimization for convenience
> patch review
>
> Guo Ren (3):
> riscv: atomic: Cleanup unnecessary definition
> riscv: atomic: Optimize acquire and release for AMO operations
> riscv: atomic: Optimize memory barrier semantics of LRSC-pairs
>
> arch/riscv/include/asm/atomic.h | 70 ++++++++++++++++++++++++++++++--
> arch/riscv/include/asm/cmpxchg.h | 42 +++++--------------
> 2 files changed, 76 insertions(+), 36 deletions(-)
>
> --
> 2.25.1
>
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