On Tue, Dec 21, 2021 at 4:55 AM Xiongfeng Wang <wangxiongfeng2@xxxxxxxxxx> wrote: > > For memory accesses with write-combining attributes (e.g. those returned > by ioremap_wc()), the CPU may wait for prior accesses to be merged with > subsequent ones. But in some situation, such wait is bad for the > performance. > > We introduce io_stop_wc() to prevent the merging of write-combining > memory accesses before this macro with those after it. > > We add implementation for ARM64 using DGH instruction and provide NOP > implementation for other architectures. > > Signed-off-by: Xiongfeng Wang <wangxiongfeng2@xxxxxxxxxx> > Suggested-by: Will Deacon <will@xxxxxxxxxx> > Suggested-by: Catalin Marinas <catalin.marinas@xxxxxxx> > --- > v1->v2: change 'Normal-Non Cacheable' to 'write-combining' For asm-generic: Acked-by: Arnd Bergmann <arnd@xxxxxxxx> Will, Catalin: if you are happy with this version, please merge it through the arm64 tree.
