Re: [PATCH 1/2] mips: convert syscall to generic entry

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Hi,

On 2021/9/9 下午8:45, Zhou Yanjie wrote:
Hi,

On 2021/9/8 下午8:41, Jiaxun Yang wrote:

在 2021/9/8 16:51, Thomas Bogendoerfer 写道:
On Wed, Sep 08, 2021 at 10:08:47AM +0800, 陈飞扬 wrote:
On Tue, 7 Sept 2021 at 21:49, Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:

在 2021/9/7 14:16, FreeFlyingSheep 写道:
From: Feiyang Chen <chenfeiyang@xxxxxxxxxxx>

Convert mips syscall to use the generic entry infrastructure from
kernel/entry/*.

There are a few special things on mips:

- There is one type of syscall on mips32 (scall32-o32) and three types of syscalls on mips64 (scall64-o32, scall64-n32 and scall64-n64). Now
convert to C code to handle different types of syscalls.

- For some special syscalls (e.g. fork, clone, clone3 and sysmips),
save_static_function() wrapper is used to save static registers. Now
SAVE_STATIC is used in handle_sys before calling do_syscall(), so the
save_static_function() wrapper can be removed.

- For sigreturn/rt_sigreturn and sysmips, inline assembly is used to
jump to syscall_exit directly for skipping setting the error flag and
restoring all registers. Now use regs->regs[27] to mark whether to
handle the error flag and always restore all registers in handle_sys,
so these functions can return normally as other architecture.
Hmm, that would give us overhead of register context on these syscalls.

I guess it's worthy?

Hi, Jiaxun,

Saving and restoring registers against different system calls can be
difficult due to the use of generic entry.
To avoid a lot of duplicate code, I think the overhead is worth it.
could you please provide numbers for that ? This code still runs
on low end MIPS CPUs for which overhead might mean a different
ballpark than some highend Loongson CPUs.

It shows ~3% regression for UnixBench on MT7621A (1004Kec).

+ Yanjie could you help with a run on ingenic platform?


Sure, I can help with JZ4775, JZ4780, X1000, X1830, X2000 from Ingenic, and SF16A18, SF19A2890 from SiFlower.


Sorry for the delay.

I encountered some troubles when testing UNIX Bench on the Ingenic X2000(SMT on) and two SiFlower processors,
so I ended up with only the following test results:


Score Without Patches    Score With Patches    Performance Change    SoC Model             105.9                                    101.2                      -4.4%                         JZ4775             132.4                                    122.0                      -7.9%                         JZ4780(SMP off)             170.2                                    149.5                    -12.2%                         JZ4780(SMP on)             101.3                                      89.0                    -12.1%                         X1000E             187.1                                    177.7                      -5.0%                         X1830             324.9                                    312.2                      -3.9%                         X2000(SMT off)


On the whole, the impact on performance is quite huge.


Thanks and best regards!



+ Paul could you help with a run on JZ4760 and JZ4770?

+ Nikolaus could you help with a run on JZ4730?


Thanks and best regards!



Thanks.

- Jiaxun


Thomas.




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